info

.gitignore

@@ -1 +1,3 @@
-*.lss
+*.lss
+*.lst
+*.pro

README.md

@@ -0,0 +1,5 @@
+# Shift Register Example
+
+This is my example of working with a shift register 74HC595 using an AVR microcontroller. This example does not use any data interface (SPI, USI). Instead, a small algorithm is implemented that controls the three pins of the microcontroller (DATA, LATCH and CLOCK).
+
+![simulation](./simulation.gif)

firmware.asm

@@ -14,15 +14,15 @@
 .INCLUDE "tn2313Adef.inc"
 .LIST
 
-.DEF COUNTER = r20
+.DEF DATA = r20               ; DATA to transmit
 
 ;========================================;
 ;                LABELS                  ;
 ;========================================;
 
-.EQU CLOCK_PIN        = PB0   ; ST_CP on 74HC595
+.EQU CLOCK_PIN        = PB0   ; SH_CP on 74HC595
 .EQU DATA_PIN         = PB1   ; DS on 74HC595
-.EQU LATCH_PIN        = PB2   ; SH_CP on 74HC595
+.EQU LATCH_PIN        = PB2   ; ST_CP on 74HC595
 
 ;========================================;
 ;              CODE SEGMENT              ;
@@ -66,8 +66,7 @@ RESET_vect:
 
 MCU_INIT:
   rcall     INIT_PORTS
-
-  ldi       COUNTER, 0
+  ldi       DATA, 0b00000001
   rjmp      LOOP
 
 INIT_PORTS:
@@ -80,7 +79,9 @@ ret
 ;========================================;
 TRANSMIT_595:
   push      r19
-  mov       r19, COUNTER
+  push      r21
+  in        r21, SREG
+  mov       r19, DATA
   ldi       r16, 8
   _TRANSMIT_595_LOOP:
     lsl     r19
@@ -97,10 +98,12 @@ TRANSMIT_595:
     _TRANSMIT_595_COMMIT:
       sbi      PORTB, CLOCK_PIN
       cbi      PORTB, CLOCK_PIN
-      sbi      PORTB, LATCH_PIN
-      cbi      PORTB, LATCH_PIN 
     dec      r16
     brne     _TRANSMIT_595_LOOP
+    sbi      PORTB, LATCH_PIN
+    cbi      PORTB, LATCH_PIN 
+  out        SREG, r21
+  pop        r21
   pop        r19
 ret
 
@@ -110,15 +113,12 @@ ret
 
 LOOP:
   rcall     TRANSMIT_595
-  inc       COUNTER
   rcall     DELAY
+  rol       DATA
   rjmp      LOOP
 
 DELAY:
-  push      r16
-  push      r17
-  cli
-  ldi       r16, 20
+  ldi       r16, 70
   _DELAY_1:
     ldi     r17, 255   
   _DELAY_2:
@@ -130,8 +130,4 @@ DELAY:
 
     dec     r16
     brne    _DELAY_1    
-  sei
-
-  pop       r17
-  pop       r16
 ret                    

firmware.hex

@@ -1,8 +1,8 @@
 :020000020000FC
-:1000000000C00FED0DBF02D040E014C007E007BBF9
-:1000100008953F93342F08E0330F18F400F0C19A8D
-:1000200001C0C198C09AC098C29AC2980A95A1F717
-:100030003F910895EEDF439501D0FCCF0F931F93BE
-:10004000F89404E11FEF1A95000000000000D9F7B2
-:0C0050000A95C1F778941F910F91089554
+:1000000000C00FED0DBF02D041E018C007E007BBF4
+:1000100008953F935F935FB7342F08E0330F18F4D0
+:1000200000F0C19A01C0C198C09AC0980A95B1F772
+:10003000C29AC2985FBF5F913F910895EADF02D0F4
+:10004000441FFCCF06E41FEF1A95000000000000DB
+:08005000D9F70A95C1F70895E4
 :00000001FF