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attiny2313a_thermostat/dist/default/production/attiny2313a_thermostat.X.production.lss
sergeyyarkov 59b71a21d6
read temperature
2023-06-19 19:49:14 +03:00

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AVRASM ver. 2.2.7 main.asm Mon Jun 19 19:48:15 2023
[builtin](2): Including file '/home/sergeyyarkov/.mchp_packs/Microchip/ATtiny_DFP/3.0.151/avrasm/inc\tn2313Adef.inc'
main.asm(15): Including file 'definitions.asm'
main.asm(16): Including file 'macros.asm'
main.asm(215): Including file 'div16u.asm'
div16u.asm(22): warning: Register r16 already defined by the .DEF directive
main.asm(215): 'div16u.asm' included form here
div16u.asm(23): warning: Register r17 already defined by the .DEF directive
main.asm(215): 'div16u.asm' included form here
div16u.asm(24): warning: Register r16 already defined by the .DEF directive
main.asm(215): 'div16u.asm' included form here
div16u.asm(25): warning: Register r17 already defined by the .DEF directive
main.asm(215): 'div16u.asm' included form here
div16u.asm(27): warning: Register r19 already defined by the .DEF directive
main.asm(215): 'div16u.asm' included form here
div16u.asm(28): warning: Register r20 already defined by the .DEF directive
main.asm(215): 'div16u.asm' included form here
[builtin](2): Including file '/home/sergeyyarkov/.mchp_packs/Microchip/ATtiny_DFP/3.0.151/avrasm/inc\tn2313Adef.inc'
main.asm(15): Including file 'definitions.asm'
main.asm(16): Including file 'macros.asm'
main.asm(215): Including file 'div16u.asm'
;
;***** Created: 2011-02-09 12:04 ******* Source: ATtiny2313A.xml *********
;*************************************************************************
;* A P P L I C A T I O N N O T E F O R T H E A V R F A M I L Y
;*
;* Number : AVR000
;* File Name : "tn2313Adef.inc"
;* Title : Register/Bit Definitions for the ATtiny2313A
;* Date : 2011-02-09
;* Version : 2.35
;* Support E-mail : avr@atmel.com
;* Target MCU : ATtiny2313A
;*
;* DESCRIPTION
;* When including this file in the assembly program file, all I/O register
;* names and I/O register bit names appearing in the data book can be used.
;* In addition, the six registers forming the three data pointers X, Y and
;* Z have been assigned names XL - ZH. Highest RAM address for Internal
;* SRAM is also defined
;*
;* The Register names are represented by their hexadecimal address.
;*
;* The Register Bit names are represented by their bit number (0-7).
;*
;* Please observe the difference in using the bit names with instructions
;* such as "sbr"/"cbr" (set/clear bit in register) and "sbrs"/"sbrc"
;* (skip if bit in register set/cleared). The following example illustrates
;* this:
;*
;* in r16,PORTB ;read PORTB latch
;* sbr r16,(1<<PB6)+(1<<PB5) ;set PB6 and PB5 (use masks, not bit#)
;* out PORTB,r16 ;output to PORTB
;*
;* in r16,TIFR ;read the Timer Interrupt Flag Register
;* sbrc r16,TOV0 ;test the overflow flag (use bit#)
;* rjmp TOV0_is_set ;jump if set
;* ... ;otherwise do something else
;*************************************************************************
#ifndef _TN2313ADEF_INC_
#define _TN2313ADEF_INC_
#pragma partinc 0
; ***** SPECIFY DEVICE ***************************************************
.device ATtiny2313A
#pragma AVRPART ADMIN PART_NAME ATtiny2313A
.equ SIGNATURE_000 = 0x1e
.equ SIGNATURE_001 = 0x91
.equ SIGNATURE_002 = 0x0a
#pragma AVRPART CORE CORE_VERSION V2
#pragma AVRPART CORE NEW_INSTRUCTIONS lpm rd,z+
; ***** I/O REGISTER DEFINITIONS *****************************************
; NOTE:
; Definitions marked "MEMORY MAPPED"are extended I/O ports
; and cannot be used with IN/OUT instructions
.equ SREG = 0x3f
.equ SPL = 0x3d
.equ OCR0B = 0x3c
.equ GIMSK = 0x3b
.equ EIFR = 0x3a
.equ TIMSK = 0x39
.equ TIFR = 0x38
.equ SPMCSR = 0x37
.equ OCR0A = 0x36
.equ MCUCR = 0x35
.equ MCUSR = 0x34
.equ TCCR0B = 0x33
.equ TCNT0 = 0x32
.equ OSCCAL = 0x31
.equ TCCR0A = 0x30
.equ TCCR1A = 0x2f
.equ TCCR1B = 0x2e
.equ TCNT1L = 0x2c
.equ TCNT1H = 0x2d
.equ OCR1AL = 0x2a
.equ OCR1AH = 0x2b
.equ OCR1BL = 0x28
.equ OCR1BH = 0x29
.equ CLKPR = 0x26
.equ ICR1L = 0x24
.equ ICR1H = 0x25
.equ GTCCR = 0x23
.equ TCCR1C = 0x22
.equ WDTCR = 0x21
.equ PCMSK0 = 0x20
.equ EEAR = 0x1e
.equ EEDR = 0x1d
.equ EECR = 0x1c
.equ PORTA = 0x1b
.equ DDRA = 0x1a
.equ PINA = 0x19
.equ PORTB = 0x18
.equ DDRB = 0x17
.equ PINB = 0x16
.equ GPIOR2 = 0x15
.equ GPIOR1 = 0x14
.equ GPIOR0 = 0x13
.equ PORTD = 0x12
.equ DDRD = 0x11
.equ PIND = 0x10
.equ USIDR = 0x0f
.equ USISR = 0x0e
.equ USICR = 0x0d
.equ UDR = 0x0c
.equ UCSRA = 0x0b
.equ UCSRB = 0x0a
.equ UBRRL = 0x09
.equ ACSR = 0x08
.equ BODCR = 0x07
.equ PRR = 0x06
.equ PCMSK2 = 0x05
.equ PCMSK1 = 0x04
.equ UCSRC = 0x03
.equ UBRRH = 0x02
.equ DIDR = 0x01
; ***** BIT DEFINITIONS **************************************************
; ***** PORTB ************************
; PORTB - Port B Data Register
.equ PORTB0 = 0 ; Port B Data Register bit 0
.equ PB0 = 0 ; For compatibility
.equ PORTB1 = 1 ; Port B Data Register bit 1
.equ PB1 = 1 ; For compatibility
.equ PORTB2 = 2 ; Port B Data Register bit 2
.equ PB2 = 2 ; For compatibility
.equ PORTB3 = 3 ; Port B Data Register bit 3
.equ PB3 = 3 ; For compatibility
.equ PORTB4 = 4 ; Port B Data Register bit 4
.equ PB4 = 4 ; For compatibility
.equ PORTB5 = 5 ; Port B Data Register bit 5
.equ PB5 = 5 ; For compatibility
.equ PORTB6 = 6 ; Port B Data Register bit 6
.equ PB6 = 6 ; For compatibility
.equ PORTB7 = 7 ; Port B Data Register bit 7
.equ PB7 = 7 ; For compatibility
; DDRB - Port B Data Direction Register
.equ DDB0 = 0 ; Port B Data Direction Register bit 0
.equ DDB1 = 1 ; Port B Data Direction Register bit 1
.equ DDB2 = 2 ; Port B Data Direction Register bit 2
.equ DDB3 = 3 ; Port B Data Direction Register bit 3
.equ DDB4 = 4 ; Port B Data Direction Register bit 4
.equ DDB5 = 5 ; Port B Data Direction Register bit 5
.equ DDB6 = 6 ; Port B Data Direction Register bit 6
.equ DDB7 = 7 ; Port B Data Direction Register bit 7
; PINB - Port B Input Pins
.equ PINB0 = 0 ; Port B Input Pins bit 0
.equ PINB1 = 1 ; Port B Input Pins bit 1
.equ PINB2 = 2 ; Port B Input Pins bit 2
.equ PINB3 = 3 ; Port B Input Pins bit 3
.equ PINB4 = 4 ; Port B Input Pins bit 4
.equ PINB5 = 5 ; Port B Input Pins bit 5
.equ PINB6 = 6 ; Port B Input Pins bit 6
.equ PINB7 = 7 ; Port B Input Pins bit 7
; ***** TIMER_COUNTER_0 **************
; TIMSK - Timer/Counter Interrupt Mask Register
.equ OCIE0A = 0 ; Timer/Counter0 Output Compare Match A Interrupt Enable
.equ TOIE0 = 1 ; Timer/Counter0 Overflow Interrupt Enable
.equ OCIE0B = 2 ; Timer/Counter0 Output Compare Match B Interrupt Enable
; TIFR - Timer/Counter Interrupt Flag register
.equ OCF0A = 0 ; Timer/Counter0 Output Compare Flag 0A
.equ TOV0 = 1 ; Timer/Counter0 Overflow Flag
.equ OCF0B = 2 ; Timer/Counter0 Output Compare Flag 0B
; OCR0B - Timer/Counter0 Output Compare Register
.equ OCR0_0 = 0 ;
.equ OCR0_1 = 1 ;
.equ OCR0_2 = 2 ;
.equ OCR0_3 = 3 ;
.equ OCR0_4 = 4 ;
.equ OCR0_5 = 5 ;
.equ OCR0_6 = 6 ;
.equ OCR0_7 = 7 ;
; OCR0A - Timer/Counter0 Output Compare Register
.equ OCR0A_0 = 0 ;
.equ OCR0A_1 = 1 ;
.equ OCR0A_2 = 2 ;
.equ OCR0A_3 = 3 ;
.equ OCR0A_4 = 4 ;
.equ OCR0A_5 = 5 ;
.equ OCR0A_6 = 6 ;
.equ OCR0A_7 = 7 ;
; TCCR0A - Timer/Counter Control Register A
.equ WGM00 = 0 ; Waveform Generation Mode
.equ WGM01 = 1 ; Waveform Generation Mode
.equ COM0B0 = 4 ; Compare Match Output B Mode
.equ COM0B1 = 5 ; Compare Match Output B Mode
.equ COM0A0 = 6 ; Compare Match Output A Mode
.equ COM0A1 = 7 ; Compare Match Output A Mode
; TCNT0 - Timer/Counter0
.equ TCNT0_0 = 0 ;
.equ TCNT0_1 = 1 ;
.equ TCNT0_2 = 2 ;
.equ TCNT0_3 = 3 ;
.equ TCNT0_4 = 4 ;
.equ TCNT0_5 = 5 ;
.equ TCNT0_6 = 6 ;
.equ TCNT0_7 = 7 ;
; TCCR0B - Timer/Counter Control Register B
.equ TCCR0 = TCCR0B ; For compatibility
.equ CS00 = 0 ; Clock Select
.equ CS01 = 1 ; Clock Select
.equ CS02 = 2 ; Clock Select
.equ WGM02 = 3 ;
.equ FOC0B = 6 ; Force Output Compare B
.equ FOC0A = 7 ; Force Output Compare B
; ***** TIMER_COUNTER_1 **************
; TIMSK - Timer/Counter Interrupt Mask Register
.equ ICIE1 = 3 ; Timer/Counter1 Input Capture Interrupt Enable
.equ TICIE = ICIE1 ; For compatibility
.equ OCIE1B = 5 ; Timer/Counter1 Output CompareB Match Interrupt Enable
.equ OCIE1A = 6 ; Timer/Counter1 Output CompareA Match Interrupt Enable
.equ TOIE1 = 7 ; Timer/Counter1 Overflow Interrupt Enable
; TIFR - Timer/Counter Interrupt Flag register
.equ ICF1 = 3 ; Input Capture Flag 1
.equ OCF1B = 5 ; Output Compare Flag 1B
.equ OCF1A = 6 ; Output Compare Flag 1A
.equ TOV1 = 7 ; Timer/Counter1 Overflow Flag
; TCCR1A - Timer/Counter1 Control Register A
.equ WGM10 = 0 ; Pulse Width Modulator Select Bit 0
.equ PWM10 = WGM10 ; For compatibility
.equ WGM11 = 1 ; Pulse Width Modulator Select Bit 1
.equ PWM11 = WGM11 ; For compatibility
.equ COM1B0 = 4 ; Comparet Ouput Mode 1B, bit 0
.equ COM1B1 = 5 ; Compare Output Mode 1B, bit 1
.equ COM1A0 = 6 ; Comparet Ouput Mode 1A, bit 0
.equ COM1A1 = 7 ; Compare Output Mode 1A, bit 1
; TCCR1B - Timer/Counter1 Control Register B
.equ CS10 = 0 ; Clock Select bit 0
.equ CS11 = 1 ; Clock Select 1 bit 1
.equ CS12 = 2 ; Clock Select1 bit 2
.equ WGM12 = 3 ; Waveform Generation Mode Bit 2
.equ CTC1 = WGM12 ; For compatibility
.equ WGM13 = 4 ; Waveform Generation Mode Bit 3
.equ ICES1 = 6 ; Input Capture 1 Edge Select
.equ ICNC1 = 7 ; Input Capture 1 Noise Canceler
; TCCR1C - Timer/Counter1 Control Register C
.equ FOC1B = 6 ; Force Output Compare for Channel B
.equ FOC1A = 7 ; Force Output Compare for Channel A
; ***** WATCHDOG *********************
; WDTCR - Watchdog Timer Control Register
.equ WDTCSR = WDTCR ; For compatibility
.equ WDP0 = 0 ; Watch Dog Timer Prescaler bit 0
.equ WDP1 = 1 ; Watch Dog Timer Prescaler bit 1
.equ WDP2 = 2 ; Watch Dog Timer Prescaler bit 2
.equ WDE = 3 ; Watch Dog Enable
.equ WDCE = 4 ; Watchdog Change Enable
.equ WDTOE = WDCE ; For compatibility
.equ WDP3 = 5 ; Watchdog Timer Prescaler Bit 3
.equ WDIE = 6 ; Watchdog Timeout Interrupt Enable
.equ WDIF = 7 ; Watchdog Timeout Interrupt Flag
; ***** USART ************************
; UDR - USART I/O Data Register
.equ UDR0 = 0 ; USART I/O Data Register bit 0
.equ UDR1 = 1 ; USART I/O Data Register bit 1
.equ UDR2 = 2 ; USART I/O Data Register bit 2
.equ UDR3 = 3 ; USART I/O Data Register bit 3
.equ UDR4 = 4 ; USART I/O Data Register bit 4
.equ UDR5 = 5 ; USART I/O Data Register bit 5
.equ UDR6 = 6 ; USART I/O Data Register bit 6
.equ UDR7 = 7 ; USART I/O Data Register bit 7
; UCSRA - USART Control and Status Register A
.equ USR = UCSRA ; For compatibility
.equ MPCM = 0 ; Multi-processor Communication Mode
.equ U2X = 1 ; Double the USART Transmission Speed
.equ UPE = 2 ; USART Parity Error
.equ PE = UPE ; For compatibility
.equ DOR = 3 ; Data overRun
.equ FE = 4 ; Framing Error
.equ UDRE = 5 ; USART Data Register Empty
.equ TXC = 6 ; USART Transmitt Complete
.equ RXC = 7 ; USART Receive Complete
; UCSRB - USART Control and Status Register B
.equ UCR = UCSRB ; For compatibility
.equ TXB8 = 0 ; Transmit Data Bit 8
.equ RXB8 = 1 ; Receive Data Bit 8
.equ UCSZ2 = 2 ; Character Size
.equ CHR9 = UCSZ2 ; For compatibility
.equ TXEN = 3 ; Transmitter Enable
.equ RXEN = 4 ; Receiver Enable
.equ UDRIE = 5 ; USART Data register Empty Interrupt Enable
.equ TXCIE = 6 ; TX Complete Interrupt Enable
.equ RXCIE = 7 ; RX Complete Interrupt Enable
; UCSRC - USART Control and Status Register C
.equ UCPOL = 0 ; Clock Polarity
.equ UCSZ0 = 1 ; Character Size Bit 0
.equ UCSZ1 = 2 ; Character Size Bit 1
.equ USBS = 3 ; Stop Bit Select
.equ UPM0 = 4 ; Parity Mode Bit 0
.equ UPM1 = 5 ; Parity Mode Bit 1
.equ UMSEL0 = 6 ; USART Mode Select 0
.equ UMSEL1 = 7 ; USART Mode Select 1
.equ UCPHA = 1 ; USART MSPIM Clock Phase
.equ UDORD = 2 ; USART MSPIM Data Order
.equ UBRR = UBRRL ; For compatibility
; ***** ANALOG_COMPARATOR ************
; ACSR - Analog Comparator Control And Status Register
.equ ACIS0 = 0 ; Analog Comparator Interrupt Mode Select bit 0
.equ ACIS1 = 1 ; Analog Comparator Interrupt Mode Select bit 1
.equ ACIC = 2 ;
.equ ACIE = 3 ; Analog Comparator Interrupt Enable
.equ ACI = 4 ; Analog Comparator Interrupt Flag
.equ ACO = 5 ; Analog Compare Output
.equ ACBG = 6 ; Analog Comparator Bandgap Select
.equ ACD = 7 ; Analog Comparator Disable
; DIDR - Digital Input Disable Register 1
.equ AIN0D = 0 ; AIN0 Digital Input Disable
.equ AIN1D = 1 ; AIN1 Digital Input Disable
; ***** PORTD ************************
; PORTD - Data Register, Port D
.equ PORTD0 = 0 ;
.equ PD0 = 0 ; For compatibility
.equ PORTD1 = 1 ;
.equ PD1 = 1 ; For compatibility
.equ PORTD2 = 2 ;
.equ PD2 = 2 ; For compatibility
.equ PORTD3 = 3 ;
.equ PD3 = 3 ; For compatibility
.equ PORTD4 = 4 ;
.equ PD4 = 4 ; For compatibility
.equ PORTD5 = 5 ;
.equ PD5 = 5 ; For compatibility
.equ PORTD6 = 6 ;
.equ PD6 = 6 ; For compatibility
; DDRD - Data Direction Register, Port D
.equ DDD0 = 0 ;
.equ DDD1 = 1 ;
.equ DDD2 = 2 ;
.equ DDD3 = 3 ;
.equ DDD4 = 4 ;
.equ DDD5 = 5 ;
.equ DDD6 = 6 ;
; PIND - Input Pins, Port D
.equ PIND0 = 0 ;
.equ PIND1 = 1 ;
.equ PIND2 = 2 ;
.equ PIND3 = 3 ;
.equ PIND4 = 4 ;
.equ PIND5 = 5 ;
.equ PIND6 = 6 ;
; ***** EEPROM ***********************
; EEAR - EEPROM Read/Write Access
.equ EEARL = EEAR ; For compatibility
.equ EEAR0 = 0 ; EEPROM Read/Write Access bit 0
.equ EEAR1 = 1 ; EEPROM Read/Write Access bit 1
.equ EEAR2 = 2 ; EEPROM Read/Write Access bit 2
.equ EEAR3 = 3 ; EEPROM Read/Write Access bit 3
.equ EEAR4 = 4 ; EEPROM Read/Write Access bit 4
.equ EEAR5 = 5 ; EEPROM Read/Write Access bit 5
.equ EEAR6 = 6 ; EEPROM Read/Write Access bit 6
; EEDR - EEPROM Data Register
.equ EEDR0 = 0 ; EEPROM Data Register bit 0
.equ EEDR1 = 1 ; EEPROM Data Register bit 1
.equ EEDR2 = 2 ; EEPROM Data Register bit 2
.equ EEDR3 = 3 ; EEPROM Data Register bit 3
.equ EEDR4 = 4 ; EEPROM Data Register bit 4
.equ EEDR5 = 5 ; EEPROM Data Register bit 5
.equ EEDR6 = 6 ; EEPROM Data Register bit 6
.equ EEDR7 = 7 ; EEPROM Data Register bit 7
; EECR - EEPROM Control Register
.equ EERE = 0 ; EEPROM Read Enable
.equ EEPE = 1 ; EEPROM Write Enable
.equ EEWE = EEPE ; For compatibility
.equ EEMPE = 2 ; EEPROM Master Write Enable
.equ EEMWE = EEMPE ; For compatibility
.equ EERIE = 3 ; EEProm Ready Interrupt Enable
.equ EEPM0 = 4 ;
.equ EEPM1 = 5 ;
; ***** PORTA ************************
; PORTA - Port A Data Register
.equ PORTA0 = 0 ; Port A Data Register bit 0
.equ PA0 = 0 ; For compatibility
.equ PORTA1 = 1 ; Port A Data Register bit 1
.equ PA1 = 1 ; For compatibility
.equ PORTA2 = 2 ; Port A Data Register bit 2
.equ PA2 = 2 ; For compatibility
; DDRA - Port A Data Direction Register
.equ DDA0 = 0 ; Data Direction Register, Port A, bit 0
.equ DDA1 = 1 ; Data Direction Register, Port A, bit 1
.equ DDA2 = 2 ; Data Direction Register, Port A, bit 2
; PINA - Port A Input Pins
.equ PINA0 = 0 ; Input Pins, Port A bit 0
.equ PINA1 = 1 ; Input Pins, Port A bit 1
.equ PINA2 = 2 ; Input Pins, Port A bit 2
; ***** USI **************************
; USIDR - USI Data Register
.equ USIDR0 = 0 ; USI Data Register bit 0
.equ USIDR1 = 1 ; USI Data Register bit 1
.equ USIDR2 = 2 ; USI Data Register bit 2
.equ USIDR3 = 3 ; USI Data Register bit 3
.equ USIDR4 = 4 ; USI Data Register bit 4
.equ USIDR5 = 5 ; USI Data Register bit 5
.equ USIDR6 = 6 ; USI Data Register bit 6
.equ USIDR7 = 7 ; USI Data Register bit 7
; USISR - USI Status Register
.equ USICNT0 = 0 ; USI Counter Value Bit 0
.equ USICNT1 = 1 ; USI Counter Value Bit 1
.equ USICNT2 = 2 ; USI Counter Value Bit 2
.equ USICNT3 = 3 ; USI Counter Value Bit 3
.equ USIDC = 4 ; Data Output Collision
.equ USIPF = 5 ; Stop Condition Flag
.equ USIOIF = 6 ; Counter Overflow Interrupt Flag
.equ USISIF = 7 ; Start Condition Interrupt Flag
; USICR - USI Control Register
.equ USITC = 0 ; Toggle Clock Port Pin
.equ USICLK = 1 ; Clock Strobe
.equ USICS0 = 2 ; USI Clock Source Select Bit 0
.equ USICS1 = 3 ; USI Clock Source Select Bit 1
.equ USIWM0 = 4 ; USI Wire Mode Bit 0
.equ USIWM1 = 5 ; USI Wire Mode Bit 1
.equ USIOIE = 6 ; Counter Overflow Interrupt Enable
.equ USISIE = 7 ; Start Condition Interrupt Enable
; ***** EXTERNAL_INTERRUPT ***********
; GIMSK - General Interrupt Mask Register
.equ PCIE1 = 3 ;
.equ PCIE2 = 4 ;
.equ PCIE0 = 5 ;
.equ INT0 = 6 ; External Interrupt Request 0 Enable
.equ INT1 = 7 ; External Interrupt Request 1 Enable
; EIFR - Extended Interrupt Flag Register
.equ GIFR = EIFR ; For compatibility
.equ PCIF0 = 5 ;
.equ PCIF2 = 4 ;
.equ PCIF1 = 3 ;
.equ INTF0 = 6 ; External Interrupt Flag 0
.equ INTF1 = 7 ; External Interrupt Flag 1
; PCMSK2 - Pin Change Interrupt Mask Register 2
.equ PCINT11 = 0 ; Pin Change Interrupt Mask 11
.equ PCINT12 = 1 ; Pin Change Interrupt Mask 12
.equ PCINT13 = 2 ; Pin Change Interrupt Mask 13
.equ PCINT14 = 3 ; Pin Change Interrupt Mask 14
.equ PCINT15 = 4 ; Pin Change Interrupt Mask 15
.equ PCINT16 = 5 ; Pin Change Interrupt Mask 16
.equ PCINT17 = 6 ; Pin Change Interrupt Mask 17
; PCMSK1 - Pin Change Interrupt Mask Register 1
.equ PCINT8 = 0 ; Pin Change Interrupt Mask 8
.equ PCINT9 = 1 ; Pin Change Interrupt Mask 9
.equ PCINT10 = 2 ; Pin Change Interrupt Mask 10
; ***** CPU **************************
; SREG - Status Register
.equ SREG_C = 0 ; Carry Flag
.equ SREG_Z = 1 ; Zero Flag
.equ SREG_N = 2 ; Negative Flag
.equ SREG_V = 3 ; Two's Complement Overflow Flag
.equ SREG_S = 4 ; Sign Bit
.equ SREG_H = 5 ; Half Carry Flag
.equ SREG_T = 6 ; Bit Copy Storage
.equ SREG_I = 7 ; Global Interrupt Enable
; SPMCSR - Store Program Memory Control and Status register
.equ SPMEN = 0 ; Store Program Memory Enable
.equ PGERS = 1 ; Page Erase
.equ PGWRT = 2 ; Page Write
.equ RFLB = 3 ; Read Fuse and Lock Bits
.equ CTPB = 4 ; Clear Temporary Page Buffer
; MCUCR - MCU Control Register
.equ ISC00 = 0 ; Interrupt Sense Control 0 bit 0
.equ ISC01 = 1 ; Interrupt Sense Control 0 bit 1
.equ ISC10 = 2 ; Interrupt Sense Control 1 bit 0
.equ ISC11 = 3 ; Interrupt Sense Control 1 bit 1
.equ SM0 = 4 ; Sleep Mode Select Bit 0
.equ SM = SM0 ; For compatibility
.equ SE = 5 ; Sleep Enable
.equ SM1 = 6 ; Sleep Mode Select Bit 1
.equ PUD = 7 ; Pull-up Disable
; CLKPR - Clock Prescale Register
.equ CLKPS0 = 0 ; Clock Prescaler Select Bit 0
.equ CLKPS1 = 1 ; Clock Prescaler Select Bit 1
.equ CLKPS2 = 2 ; Clock Prescaler Select Bit 2
.equ CLKPS3 = 3 ; Clock Prescaler Select Bit 3
.equ CLKPCE = 7 ; Clock Prescaler Change Enable
; MCUSR - MCU Status register
.equ PORF = 0 ; Power-On Reset Flag
.equ EXTRF = 1 ; External Reset Flag
.equ BORF = 2 ; Brown-out Reset Flag
.equ WDRF = 3 ; Watchdog Reset Flag
; OSCCAL - Oscillator Calibration Register
.equ CAL0 = 0 ; Oscillatro Calibration Value Bit 0
.equ CAL1 = 1 ; Oscillatro Calibration Value Bit 1
.equ CAL2 = 2 ; Oscillatro Calibration Value Bit 2
.equ CAL3 = 3 ; Oscillatro Calibration Value Bit 3
.equ CAL4 = 4 ; Oscillatro Calibration Value Bit 4
.equ CAL5 = 5 ; Oscillatro Calibration Value Bit 5
.equ CAL6 = 6 ; Oscillatro Calibration Value Bit 6
; GTCCR - General Timer Counter Control Register
.equ SFIOR = GTCCR ; For compatibility
.equ PSR10 = 0 ;
; PCMSK - Pin-Change Mask register
.equ PCINT0 = 0 ; Pin-Change Interrupt 0
.equ PCINT1 = 1 ; Pin-Change Interrupt 1
.equ PCINT2 = 2 ; Pin-Change Interrupt 2
.equ PCINT3 = 3 ; Pin-Change Interrupt 3
.equ PCINT4 = 4 ; Pin-Change Interrupt 4
.equ PCINT5 = 5 ; Pin-Change Interrupt 5
.equ PCINT6 = 6 ; Pin-Change Interrupt 6
.equ PCINT7 = 7 ; Pin-Change Interrupt 7
; GPIOR2 - General Purpose I/O Register 2
.equ GPIOR20 = 0 ; General Purpose I/O Register 2 bit 0
.equ GPIOR21 = 1 ; General Purpose I/O Register 2 bit 1
.equ GPIOR22 = 2 ; General Purpose I/O Register 2 bit 2
.equ GPIOR23 = 3 ; General Purpose I/O Register 2 bit 3
.equ GPIOR24 = 4 ; General Purpose I/O Register 2 bit 4
.equ GPIOR25 = 5 ; General Purpose I/O Register 2 bit 5
.equ GPIOR26 = 6 ; General Purpose I/O Register 2 bit 6
.equ GPIOR27 = 7 ; General Purpose I/O Register 2 bit 7
; GPIOR1 - General Purpose I/O Register 1
.equ GPIOR10 = 0 ; General Purpose I/O Register 1 bit 0
.equ GPIOR11 = 1 ; General Purpose I/O Register 1 bit 1
.equ GPIOR12 = 2 ; General Purpose I/O Register 1 bit 2
.equ GPIOR13 = 3 ; General Purpose I/O Register 1 bit 3
.equ GPIOR14 = 4 ; General Purpose I/O Register 1 bit 4
.equ GPIOR15 = 5 ; General Purpose I/O Register 1 bit 5
.equ GPIOR16 = 6 ; General Purpose I/O Register 1 bit 6
.equ GPIOR17 = 7 ; General Purpose I/O Register 1 bit 7
; GPIOR0 - General Purpose I/O Register 0
.equ GPIOR00 = 0 ; General Purpose I/O Register 0 bit 0
.equ GPIOR01 = 1 ; General Purpose I/O Register 0 bit 1
.equ GPIOR02 = 2 ; General Purpose I/O Register 0 bit 2
.equ GPIOR03 = 3 ; General Purpose I/O Register 0 bit 3
.equ GPIOR04 = 4 ; General Purpose I/O Register 0 bit 4
.equ GPIOR05 = 5 ; General Purpose I/O Register 0 bit 5
.equ GPIOR06 = 6 ; General Purpose I/O Register 0 bit 6
.equ GPIOR07 = 7 ; General Purpose I/O Register 0 bit 7
; PRR - Power reduction register
.equ PRUSART = 0 ;
.equ PRUSI = 1 ;
.equ PRTIM0 = 2 ;
.equ PRTIM1 = 3 ;
; BODCR - BOD control register
.equ BPDSE = 0 ;
.equ BPDS = 1 ;
; ***** LOCKSBITS ********************************************************
.equ LB1 = 0 ; Lockbit
.equ LB2 = 1 ; Lockbit
; ***** FUSES ************************************************************
; LOW fuse bits
.equ CKSEL0 = 0 ; Select Clock Source
.equ CKSEL1 = 1 ; Select Clock Source
.equ CKSEL2 = 2 ; Select Clock Source
.equ CKSEL3 = 3 ; Select Clock Source
.equ SUT0 = 4 ; Select start-up time
.equ SUT1 = 5 ; Select start-up time
.equ CKOUT = 6 ; Clock output
.equ CKDIV8 = 7 ; Divide clock by 8
; HIGH fuse bits
.equ BODLEVEL0 = 0 ; Brown-out Detector trigger level
.equ BODLEVEL1 = 1 ; Brown-out Detector trigger level
.equ BODLEVEL2 = 2 ; Brown-out Detector trigger level
.equ EESAVE = 3 ; EEPROM memory is preserved through chip erase
.equ WDTON = 4 ; Watchdog Timer Always On
.equ SPIEN = 5 ; Enable Serial programming and Data Downloading
.equ DWEN = 6 ; debugWIRE Enable
.equ RSTDISBL = 7 ; External reset disable
; EXTENDED fuse bits
.equ SELFPRGEN = 0 ; Self Programming Enable
; ***** CPU REGISTER DEFINITIONS *****************************************
.def XH = r27
.def XL = r26
.def YH = r29
.def YL = r28
.def ZH = r31
.def ZL = r30
; ***** DATA MEMORY DECLARATIONS *****************************************
.equ FLASHEND = 0x03ff ; Note: Word address
.equ IOEND = 0x003f
.equ SRAM_START = 0x0060
.equ SRAM_SIZE = 128
.equ RAMEND = 0x00df
.equ XRAMEND = 0x0000
.equ E2END = 0x007f
.equ EEPROMEND = 0x007f
.equ EEADRBITS = 7
#pragma AVRPART MEMORY PROG_FLASH 2048
#pragma AVRPART MEMORY EEPROM 128
#pragma AVRPART MEMORY INT_SRAM SIZE 128
#pragma AVRPART MEMORY INT_SRAM START_ADDR 0x60
; ***** BOOTLOADER DECLARATIONS ******************************************
.equ NRWW_START_ADDR = 0x0
.equ NRWW_STOP_ADDR = 0x3ff
.equ RWW_START_ADDR = 0x0
.equ RWW_STOP_ADDR = 0x0
.equ PAGESIZE = 16
; ***** INTERRUPT VECTORS ************************************************
.equ INT0addr = 0x0001 ; External Interrupt Request 0
.equ INT1addr = 0x0002 ; External Interrupt Request 1
.equ ICP1addr = 0x0003 ; Timer/Counter1 Capture Event
.equ OC1Aaddr = 0x0004 ; Timer/Counter1 Compare Match A
.equ OC1addr = 0x0004 ; For compatibility
.equ OVF1addr = 0x0005 ; Timer/Counter1 Overflow
.equ OVF0addr = 0x0006 ; Timer/Counter0 Overflow
.equ URXCaddr = 0x0007 ; USART, Rx Complete
.equ URXC0addr = 0x0007 ; For compatibility
.equ UDREaddr = 0x0008 ; USART Data Register Empty
.equ UDRE0addr = 0x0008 ; For compatibility
.equ UTXCaddr = 0x0009 ; USART, Tx Complete
.equ UTXC0addr = 0x0009 ; For compatibility
.equ ACIaddr = 0x000a ; Analog Comparator
.equ PCIBaddr = 0x000b ; Pin Change Interrupt Request B
.equ PCIaddr = 0x000b ; For compatibility
.equ OC1Baddr = 0x000c ;
.equ OC0Aaddr = 0x000d ;
.equ OC0Baddr = 0x000e ;
.equ USI_STARTaddr = 0x000f ; USI Start Condition
.equ USI_OVFaddr = 0x0010 ; USI Overflow
.equ ERDYaddr = 0x0011 ;
.equ WDTaddr = 0x0012 ; Watchdog Timer Overflow
.equ PCIAaddr = 0x0013 ; Pin Change Interrupt Request A
.equ PCIDaddr = 0x0014 ; Pin Change Interrupt Request D
.equ INT_VECTORS_SIZE = 21 ; size in words
#endif /* _TN2313ADEF_INC_ */
; ***** END OF FILE ******************************************************
; Project name: thermostat
; Description: Electronic thermostat on AVR Microcontroller
; Source code: https://github.com/sergeyyarkov/attiny2313a_thermostat
; Device: ATtiny2313A
; Device Datasheet: http://ww1.microchip.com/downloads/en/DeviceDoc/doc8246.pdf
; Assembler: AVR macro assembler 2.2.7
; Clock frequency: 8 MHz External Crystal Oscillator
; Fuses: lfuse: 0xCF, hfuse: 0x9F, efuse: 0xFF, lock: 0xFF
;
; Written by Sergey Yarkov 22.01.2023
.LIST
.INCLUDE "definitions.asm"
.DEF TEMP_REG_A = r16
.DEF TEMP_REG_B = r17
.DEF DELAY_16_r = r19
.DEF DELAY_8_r = r20
.DEF DISP_NUM_L = r24 ; LSB числа которое сейчас на индикаторе
.DEF DISP_NUM_H = r25 ; MSB числа которое сейчас на индикаторе
.EQU DIGIT_1_PIN = PD2 ; Пин разряда индикатора 1
.EQU DIGIT_2_PIN = PD3 ; Пин разряда индикатора 2
.EQU DIGIT_3_PIN = PD4 ; Пин разряда индикатора 3
.EQU DIGIT_4_PIN = PD5 ; Пин разряда индикатора 4
.EQU LED_ERR_PIN = PD6 ; Светодиод который говорит о том, что МК в состоянии ошибки
.EQU OW_LINE = PB1 ; Пин шины 1-Wire
.EQU OW_DDR = DDRB
.EQU OW_PIN = PINB
.DEF OW_CMD_r = r8
.DEF OWFR = r23 ; Флаги состояния для 1-Wire интерфейса
.EQU OWPRF = 0 ; 1-Wire Флаг присутствия
.EQU OWSB = 1 ; Флаг передачи одного бита
; **** КОМАНДЫ ДАТЧИКА *****************************************
.EQU DS18B20_CMD_CONVERTTEMP = 0x44
.EQU DS18B20_CMD_RSCRATCHPAD = 0xbe
.EQU DS18B20_CMD_WSCRATCHPAD = 0x4e
.EQU DS18B20_CMD_CPYSCRATCHPAD = 0x48
.EQU DS18B20_CMD_RECEEPROM = 0xb8
.EQU DS18B20_CMD_RPWRSUPPLY = 0xb4
.EQU DS18B20_CMD_SEARCHROM = 0xf0
.EQU DS18B20_CMD_READROM = 0x33
.EQU DS18B20_CMD_MATCHROM = 0x55
.EQU DS18B20_CMD_SKIPROM = 0xcc
.EQU DS18B20_CMD_ALARMSEARCH = 0xec
.EQU USI_LATCH_PIN = PB0 ; ST_CP на 74HC595
.EQU USI_DO_PIN = PB6 ; DS на 74HC595
.EQU USI_CLK_PIN = PB7 ; SH_CP на 74HC595
.EQU SW_PORT = PORTB
.EQU SW_PIN = PINB
.EQU SW_PLUS_PIN = PB2 ; Кнопка "Минус"
.EQU SW_MINUS_PIN = PB3 ; Кнопка "Плюс"
.EQU SW_SET_PIN = PB4 ; Кнопка "Установить"
.EQU UART_RX_PIN = PD0
.EQU UART_TX_PIN = PD1
.EQU MCU_STATE_DEFAULT = 0x00 ; Режим измерения температуры и сравнения с заданными параметрами
.EQU MCU_STATE_PROGRAM = 0x01 ; Режим настройки параметров в EEPROM
.INCLUDE "macros.asm"
ldi @0, @2
out @1, @0
.ENDMACRO
.MACRO display_load
ldi DISP_NUM_L, LOW(@0)
ldi DISP_NUM_H, HIGH(@0)
.ENDMACRO
.MACRO ow_pull
sbi OW_DDR, OW_LINE
.ENDMACRO
.MACRO ow_release
cbi OW_DDR, OW_LINE
.ENDMACRO
.MACRO DELAY16
ldi DELAY_16_r, HIGH(@0*F_CPU/4-2)
ldi DELAY_8_r, LOW(@0*F_CPU/4-2)
rcall DELAY_LOOP_16
//<editor-fold defaultstate="collapsed" desc="Сегмент данных">
; **** СЕГМЕНТ ДАННЫХ ********************************************
.DSEG
.ORG SRAM_START
000060 MCU_STATE: .BYTE 1 ; Текущее состояние МК
000061 SRAM_TEMP_1: .BYTE 2 ; Хранения временного 16-бит числа в ячейке
000063 DIGITS: .BYTE 4 ; Ячейки, где хранятся символы, для вывода на индикатор
000067 CURRENT_DIGIT: .BYTE 1 ; Номер разряда индикатора, который сейчас горит
000068 SW_FLAGS: .BYTE 1 ; Состояние кнопок
000069 HYSTERESIS: .BYTE 1 ; Отклонение температуры от уставки
00006a TEMP_L: .BYTE 1
00006b TEMP_H: .BYTE 1
;//</editor-fold>
//<editor-fold defaultstate="collapsed" desc="Сегмент кода">
; **** СЕГМЕНТ КОДА **********************************************
.CSEG
//<editor-fold defaultstate="collapsed" desc="Вектора">
.ORG 0x00
000000 c049 rjmp RESET_vect
.ORG 0x000D
00000d c000 rjmp TIMER0_COMPA_vect
//</editor-fold>
//<editor-fold defaultstate="collapsed" desc="Прерывание: Динамическая индикация">
; **** ДИНАМИЧЕСКАЯ ИНДИКАЦИЯ ************************************
TIMER0_COMPA_vect:
00000e 934f push r20
00000f 935f push r21
000010 930f push r16
000011 b75f in r21, SREG
000012 9140 0067 lds r20, CURRENT_DIGIT
000014 3045 cpi r20, 5
000015 f40c brge _CLR_CURRENT_DIGIT ; сброс активного разряда если >= 5
000016 c003 rjmp _indicate_1
_CLR_CURRENT_DIGIT: ; сброс текущего активного разряда в ноль
000017 2744 clr r20
000018 9340 0067 sts CURRENT_DIGIT, r20
_indicate_1:
00001a 3040 cpi r20, 0
00001b f441 brne _indicate_2
00001c 9893 cbi PORTD, DIGIT_2_PIN
00001d 9894 cbi PORTD, DIGIT_3_PIN
00001e 9895 cbi PORTD, DIGIT_4_PIN
00001f 9a92 sbi PORTD, DIGIT_1_PIN
000020 9100 0066 lds TEMP_REG_A, DIGITS+3
000022 d12b rcall DISPLAY_DECODER
000023 d0b6 rcall USI_TRANSMIT
_indicate_2:
000024 3041 cpi r20, 1
000025 f441 brne _indicate_3
000026 9892 cbi PORTD, DIGIT_1_PIN
000027 9894 cbi PORTD, DIGIT_3_PIN
000028 9895 cbi PORTD, DIGIT_4_PIN
000029 9a93 sbi PORTD, DIGIT_2_PIN
00002a 9100 0065 lds TEMP_REG_A, DIGITS+2
00002c d121 rcall DISPLAY_DECODER
00002d d0ac rcall USI_TRANSMIT
_indicate_3:
00002e 3042 cpi r20, 2
00002f f441 brne _indicate_4
000030 9892 cbi PORTD, DIGIT_1_PIN
000031 9893 cbi PORTD, DIGIT_2_PIN
000032 9895 cbi PORTD, DIGIT_4_PIN
000033 9a94 sbi PORTD, DIGIT_3_PIN
000034 9100 0064 lds TEMP_REG_A, DIGITS+1
000036 d117 rcall DISPLAY_DECODER
000037 d0a2 rcall USI_TRANSMIT
_indicate_4:
000038 3043 cpi r20, 3
000039 f441 brne _indicate_exit
00003a 9892 cbi PORTD, DIGIT_1_PIN
00003b 9893 cbi PORTD, DIGIT_2_PIN
00003c 9894 cbi PORTD, DIGIT_3_PIN
00003d 9a95 sbi PORTD, DIGIT_4_PIN
00003e 9100 0063 lds TEMP_REG_A, DIGITS
000040 d10d rcall DISPLAY_DECODER
000041 d098 rcall USI_TRANSMIT
_indicate_exit:
000042 9543 inc r20
000043 9340 0067 sts CURRENT_DIGIT, r20
000045 bf5f out SREG, r21
000046 910f pop r16
000047 915f pop r21
000048 914f pop r20
000049 9518 reti
;//</editor-fold>
; **** СТАРТ ПРОГРАММЫ *******************************************
RESET_vect:
00004a ed0f ldi TEMP_REG_A, LOW(RAMEND)
00004b bf0d out SPL, TEMP_REG_A
//<editor-fold defaultstate="collapsed" desc="Инициализация МК (настрока портов и переферии)">
; **** ПРОЦЕСС ИНИЦИАЛИЗАЦИИ МК **********************************
MCU_INIT:
; **** ИНИЦИАЛИЗАЦИЯ ПИНОВ *************************************
00004c e70e
00004d bb01 outi r16, DDRD, (1<<LED_ERR_PIN) | (1<<DIGIT_1_PIN) | (1<<DIGIT_2_PIN) | (1<<DIGIT_3_PIN) | (1<<DIGIT_4_PIN) | (0<<UART_RX_PIN) | (1<<UART_TX_PIN)
00004e ec01
00004f bb07 outi r16, DDRB, (1<<USI_CLK_PIN) | (1<<USI_DO_PIN) | (1<<USI_LATCH_PIN) | (0<<SW_PLUS_PIN) | (0<<SW_MINUS_PIN) | (0<<SW_SET_PIN)
000050 e10c
000051 bb08 outi r16, PORTB, (1<<SW_PLUS_PIN) | (1<<SW_MINUS_PIN) | (1<<SW_SET_PIN)
; **** ИНИЦИАЛИЗАЦИЯ ТАЙМЕРА 0 **********************************
000052 e002
000053 bf00 outi r16, TCCR0A, (1<<WGM01) ; режим CTC Compare A
000054 e005
000055 bf03 outi r16, TCCR0B, (1<<CS02) | (1<<CS00) ; 1024 делитель
000056 e109
000057 bf06 outi r16, OCR0A, 25 ; число для сравнения. (60Hz)
000058 e001
000059 bf09 outi r16, TIMSK, (1<<OCIE0A) ; включение прерывания по совпадению
; **** ИНИЦИАЛИЗАЦИЯ USART *************************************
; outi r16, UBRRL, LOW(3) ; 9600 БОД
; outi r16, UBRRH, HIGH(3) ; 9600 БОД
; outi r16, UCSRB, (1<<RXEN) | (1<<TXEN) ; Включение приема и передачии
; outi r16, UCSRC, (1<<UCSZ1) | (1<<UCSZ0) ; Асинхронный режим, 8 бит фрейм, 1 стоповый бит
00005a 2411 clr r1
00005b 9210 0067 sts CURRENT_DIGIT, r1
00005d e000 ldi r16, 0x00
00005e 9300 0060 sts MCU_STATE, r16 ; переводим МК сразу в режим измерения температуры
000060 2700 clr r16
000061 9300 006a sts TEMP_L, r16
000063 9300 006b sts TEMP_H, r16
000065 e080
000066 e090 display_load 0 ; загружаем число, которое нужно показать на индикатор
000067 9100 006a lds r16, TEMP_L
000069 2f80 mov DISP_NUM_L, r16
00006a e090 ldi DISP_NUM_H, 0
; sei
//</editor-fold>
//<editor-fold defaultstate="collapsed" desc="Главный цикл">
; **** ГЛАВНЫЙ ЦИКЛ **********************************************
LOOP:
; rcall DISPLAY_UPD_DIGITS
00006b 9100 0060 lds r16, MCU_STATE ; получаем текущее состояние МК
_STATE_DEFAULT:
00006d 3000 cpi r16, MCU_STATE_DEFAULT
00006e f489 brne _STATE_PROGRAM
00006f d0c4 rcall DISPLAY_UPD_DIGITS
000070 fd70 sbrc OWFR, OWPRF
000071 9a96 sbi PORTD, PD6
000072 ff70 sbrs OWFR, OWPRF
000073 9896 cbi PORTD, PD6
000074 d059 rcall TEMP_CONV
000075 d0e3 rcall DEBOUNCE_SW
000076 d0e2 rcall DEBOUNCE_SW
000077 d0e1 rcall DEBOUNCE_SW
000078 d0e0 rcall DEBOUNCE_SW
000079 d02e rcall TEMP_RD
00007a 9110 006a lds r17, TEMP_L
00007c 2f81 mov DISP_NUM_L, r17
00007d 9110 006b lds r17, TEMP_H
00007f 2f91 mov DISP_NUM_H, r17
_STATE_PROGRAM:
000080 3001 cpi r16, MCU_STATE_PROGRAM
000081 f411 brne _STATE_ERROR
000082 d0b1 rcall DISPLAY_UPD_DIGITS
000083 d062 rcall SW_CHECK_PROCESS
_STATE_ERROR:
000084 3002 cpi r16, MCU_STATE_ERROR
000085 f729 brne LOOP
000086 e01b ldi r17, 11
000087 9310 0063 sts DIGITS, r17
000089 9310 0064 sts DIGITS+1, r17
00008b 9310 0065 sts DIGITS+2, r17
00008d 9310 0066 sts DIGITS+3, r17
00008f 0000 nop
000090 cfda rjmp LOOP
//</editor-fold>
; **** ПОДПРОГРАММЫ **********************************************
.INCLUDE "div16u.asm"
;*
;* "div16u" - 16/16 Bit Unsigned Division
;*
;* This subroutine divides the two 16-bit numbers
;* "dd8uH:dd8uL" (dividend) and "dv16uH:dv16uL" (divisor).
;* The result is placed in "dres16uH:dres16uL" and the remainder in
;* "drem16uH:drem16uL".
;*
;* Number of words :19
;* Number of cycles :235/251 (Min/Max)
;* Low registers used :2 (drem16uL,drem16uH)
;* High registers used :5 (dres16uL/dd16uL,dres16uH/dd16uH,dv16uL,dv16uH,
;* dcnt16u)
;*
;***************************************************************************
;***** Subroutine Register Variables
.def drem16uL=r14
.def drem16uH=r15
.def dres16uL=r16
.def dres16uH=r17
.def dd16uL =r16
.def dd16uH =r17
.def dv16uL =r18
.def dv16uH =r19
.def dcnt16u =r20
;***** Code
div16u:
000091 24ee clr drem16uL ; clear remainder Low byte
000092 18ff sub drem16uH,drem16uH ; clear remainder High byte and carry
000093 e141 ldi dcnt16u,17 ; init loop counter
d16u_1:
000094 1f00 rol dd16uL ; shift left dividend
000095 1f11 rol dd16uH
000096 954a dec dcnt16u ; decrement counter
000097 f409 brne d16u_2 ; if done
000098 9508 ret ; return
d16u_2:
000099 1cee rol drem16uL ; shift dividend into remainder
00009a 1cff rol drem16uH
00009b 1ae2 sub drem16uL,dv16uL ; remainder = remainder - divisor
00009c 0af3 sbc drem16uH,dv16uH
00009d f420 brcc d16u_3 ; if result negative
00009e 0ee2 add drem16uL,dv16uL ; restore remainder
00009f 1ef3 adc drem16uH,dv16uH
0000a0 9488 clc ; clear carry to be shifted into result
0000a1 cff2 rjmp d16u_1 ; else
d16u_3:
0000a2 9408 sec ; set carry to be shifted into result
0000a3 cff0
DELAY_LOOP_16:
0000a4 5041 subi DELAY_8_r, 1
0000a5 4030 sbci DELAY_16_r, 0
0000a6 f7e8 brcc DELAY_LOOP_16
0000a7 9508 ret
//<editor-fold defaultstate="collapsed" desc="Подпрограмма: чтение и опрос температуры">
TEMP_RD:
0000a8 930f push r16
0000a9 931f push r17
0000aa 932f push r18
0000ab 94f8 cli
0000ac d03f rcall OW_PRESENCE
0000ad ec0c ldi r16, DS18B20_CMD_SKIPROM
0000ae 2e80 mov OW_CMD_r, r16
0000af d04f rcall OW_SEND_BYTE
0000b0 eb0e ldi r16, DS18B20_CMD_RSCRATCHPAD
0000b1 2e80 mov OW_CMD_r, r16
0000b2 d04c rcall OW_SEND_BYTE
0000b3 e6aa ldi XL, LOW(TEMP_L)
0000b4 e0b0 ldi XH, HIGH(TEMP_L)
0000b5 d066 rcall OW_RD_BYTE
0000b6 e6ab ldi XL, LOW(TEMP_H)
0000b7 e0b0 ldi XH, HIGH(TEMP_H)
0000b8 d063 rcall OW_RD_BYTE
0000b9 9110 006a lds r17, TEMP_L
0000bb 9120 006b lds r18, TEMP_H
0000bd 9526 lsr r18
0000be 9517 ror r17
0000bf 9526 lsr r18
0000c0 9517 ror r17
0000c1 9526 lsr r18
0000c2 9517 ror r17
0000c3 9526 lsr r18
0000c4 9517 ror r17
0000c5 9310 006a sts TEMP_L, r17
0000c7 9320 006b sts TEMP_H, r18
0000c9 9478 sei
0000ca 912f pop r18
0000cb 911f pop r17
0000cc 910f pop r16
0000cd 9508 ret
;
TEMP_CONV:
0000ce 930f push r16
0000cf 94f8 cli
0000d0 d01b rcall OW_PRESENCE
0000d1 ec0c ldi r16, DS18B20_CMD_SKIPROM
0000d2 2e80 mov OW_CMD_r, r16
0000d3 d02b rcall OW_SEND_BYTE
0000d4 e404 ldi r16, DS18B20_CMD_CONVERTTEMP
0000d5 2e80 mov OW_CMD_r, r16
0000d6 d028 rcall OW_SEND_BYTE
0000d7 9478 sei
0000d8 910f pop r16
0000d9 9508 ret
//</editor-fold>
//<editor-fold defaultstate="collapsed" desc="Подпрограмма: отправка байта в сдвиговый регистр">
; **** ОТПРАВКА БАЙТА В СДВИГОВЫЙ РЕГИСТР *************************
USI_TRANSMIT:
0000da 930f push r16
0000db b80f out USIDR, r0 ; Байт для отправки всегда находится в регистре r0. Помещаем данные в регистр USIDR.
; Enable USI Overflow Interrupt Flag (will be 0 if transfer is not compeleted)
0000dc e400 ldi TEMP_REG_A, (1<<USIOIF)
0000dd b90e out USISR, TEMP_REG_A
; Load settings of USI into temp register
; This will setup USI to Three-wire mode, Software clock strobe (USITC)
; with External, positive edge and toggle USCK
;
; USIWM0 <--------------> USI Wire Mode
; USICS1 <--------------> USI Clock Source Select
; USICLK <--------------> USI Clock Strobe
; USITC <--------------> USI Toggle Clock (Enable clock generation)
0000de e10b ldi TEMP_REG_A, (1<<USIWM0) | (1<<USICS1) | (1<<USICLK) | (1<<USITC)
_USI_TRANSMIT_LOOP: ; Execute loop when USIOIF is 0
0000df b90d out USICR, TEMP_REG_A ; Load settings from temp register into USI Control Register
0000e0 9b76 sbis USISR, USIOIF ; If transfer is comleted then move out of loop
0000e1 cffd rjmp _USI_TRANSMIT_LOOP
; Send pulse into LATCH pin.
; This will copy byte from 74hc595 shift register into 74hc595 storage register
0000e2 9ac0 sbi PORTB, USI_LATCH_PIN
0000e3 98c0 cbi PORTB, USI_LATCH_PIN
0000e4 910f pop r16
0000e5 9508 ret//</editor-fold>
//<editor-fold defaultstate="collapsed" desc="Подпрограмма: опрос кнопок">
SW_CHECK_PROCESS:
0000e6 d072 rcall DEBOUNCE_SW
0000e7 9bb2 sbis SW_PIN, SW_PLUS_PIN
0000e8 9601 adiw DISP_NUM_L, 1
0000e9 9bb3 sbis SW_PIN, SW_MINUS_PIN
0000ea 9701 sbiw DISP_NUM_L, 1
0000eb 9508 ret//</editor-fold>
//<editor-fold defaultstate="collapsed" desc="Реализация интерфеса 1-Wire">
//<editor-fold defaultstate="collapsed" desc="1-Wire: оспрос присутствия">
; **** ОПРОС ПРИСУТСТВИЯ УСТРОЙСТВА ******************************
OW_PRESENCE:
0000ec 9ab9 ow_pull
0000ed e033
0000ee eb4e
0000ef dfb4 DELAY16 480
0000f0 98b9 ow_release
0000f1 e030
0000f2 e84a
0000f3 dfb0 DELAY16 70
0000f4 d004 rcall OW_CHECK_PRESENCE
0000f5 e033
0000f6 e342
0000f7 dfac DELAY16 410
0000f8 9508 ret
//</editor-fold>
//<editor-fold defaultstate="collapsed" desc="1-Wire: проверка наличия устройства">
; **** ПРОВЕРКА НАЛИЧИЯ УСТРОЙСТВА *******************************
; Если подчиненное устройство притянет шину, то устанавливаем флаг OWPRF в единицу в регистре флагов
;
OW_CHECK_PRESENCE:
0000f9 9bb1 sbis OW_PIN, OW_LINE
0000fa 6071 sbr OWFR, (1<<OWPRF)
0000fb c002 rjmp _EXIT
0000fc 99b1 sbic OW_PIN, OW_LINE
0000fd 7f7e cbr OWFR, (1<<OWPRF)
_EXIT:
0000fe 9508 ret
//</editor-fold>
//<editor-fold defaultstate="collapsed" desc="1-Wire: отправка байта">
OW_SEND_BYTE:
0000ff 930f push r16
000100 931f push r17
000101 2d08 mov r16, OW_CMD_r
000102 e018 ldi r17, 8
_OW_SEND_BYTE_LOOP:
000103 9506 lsr r16
000104 f408 brcc _OW_SEND_0
000105 f048 brcs _OW_SEND_1
_OW_SEND_0:
000106 9ab9 ow_pull
000107 e030
000108 e746
000109 df9a DELAY16 60
00010a 98b9 ow_release
00010b e030
00010c e142
00010d df96 DELAY16 10
00010e c008 rjmp _OW_SEND_BYTE_END
_OW_SEND_1:
00010f 9ab9 ow_pull
000110 e030
000111 e04a
000112 df91 DELAY16 6
000113 98b9 ow_release
000114 e030
000115 e74e
000116 df8d DELAY16 64
_OW_SEND_BYTE_END:
000117 951a dec r17
000118 f751 brne _OW_SEND_BYTE_LOOP
000119 911f pop r17
00011a 910f pop r16
00011b 9508 ret
//</editor-fold>
//<editor-fold defaultstate="collapsed" desc="1-Wire: чтение байта">
;OW_RD_BYTE:
; push r16
; push r17
; ldi r16, 8
;_OW_RD_BYTE_LP:
; ow_pull
; DELAY16 6
; ow_release
; DELAY16 9
; lds r17, TEMP_L
; lsr r17
; sbic OW_PIN, OW_LINE
; sbr r17, (1<<7)
; sts TEMP_L, r17
; DELAY16 55
; dec r16
; brne _OW_RD_BYTE_LP
; pop r17
; pop r16
; ret
OW_RD_BYTE:
00011c 930f push r16
00011d 931f push r17
00011e 2700 clr r16
00011f e018 ldi r17, 8
_OW_RD_BYTE_LP:
000120 9506 lsr r16
000121 9ab9 ow_pull
000122 e030
000123 e04a
000124 df7f DELAY16 6
000125 98b9 ow_release
000126 e030
000127 e140
000128 df7b DELAY16 9
000129 99b1 sbic OW_PIN, OW_LINE
00012a 6800 sbr r16, (1<<7)
00012b e030
00012c e64c
00012d df76 DELAY16 55
00012e 951a dec r17
00012f f781 brne _OW_RD_BYTE_LP
000130 930c st X, r16
000131 911f pop r17
000132 910f pop r16
000133 9508 ret
//</editor-fold>
//</editor-fold>
//<editor-fold defaultstate="collapsed" desc="Подпрограмма: обновление ячеек в SRAM для индикатора">
; **** ПОЛУЧЕНИЕ ЦИФР ИЗ 16-ТИ БИТНОГО ЧИСЛА *********************
; Описание: Перемещает цифры числа в соответствующие ячейки памяти в SRAM
; путем деления этого числа несколько раз
DISPLAY_UPD_DIGITS:
000134 94f8 cli
000135 935f push r21
000136 e054 ldi r21, 4 ; (4 раза делим) т.к индикатор четырех разрядный
; инициализация указателя (за каждый проход цикла будет инкрементироваться)
000137 e6a3 ldi XL, LOW(DIGITS)
000138 e0b0 ldi XH, HIGH(DIGITS)
.equ dividend = SRAM_TEMP_1 ; число которе будем делить
.equ divisor = 10 ; на что делим
; загружаем число которое хотим поделить в адрес SRAM делимого
000139 9380 0061 sts dividend, DISP_NUM_L
00013b 9390 0062 sts dividend+1, DISP_NUM_H
; четыре раза производим деление для получения остатков
DIV_LOOP:
; заполняем нужные регистры
00013d 9100 0061 lds dd16uL, dividend
00013f 9110 0062 lds dd16uH, dividend+1
000141 e02a ldi dv16uL, LOW(divisor)
000142 e030 ldi dv16uH, HIGH(divisor)
000143 df4d rcall div16u ; делим
000144 92ed st X+, drem16uL ; сохраняем остаток в ячейку по указателю и увеличиваем его
; обновляем делимое
000145 9300 0061 sts dividend, dres16uL
000147 9310 0062 sts dividend+1, dres16uH
000149 955a dec r21 ; декрементируем счетчик цикла
00014a f791 brne DIV_LOOP ; делим еще раз если не 0
00014b 915f pop r21
00014c 9478 sei
00014d 9508 ret
//</editor-fold>
//<editor-fold defaultstate="collapsed" desc="Подпрограмма: получение символа для индикатора">
; **** ЗАГРУЖАЕТ НУЖНЫЙ АДРЕС СИМВОЛА В R0 ***********************
DISPLAY_DECODER:
00014e 930f push r16
00014f 931f push r17
000150 eeee ldi ZL, LOW(2*DISPLAY_SYMBOLS)
000151 e0f2 ldi ZH, HIGH(2*DISPLAY_SYMBOLS)
000152 2711 clr TEMP_REG_B
000153 0fe0 add ZL, TEMP_REG_A
000154 1ff1 adc ZH, TEMP_REG_B
000155 9004 lpm r0, Z
000156 911f pop r17
000157 910f pop r16
000158 9508 ret//</editor-fold>
//<editor-fold defaultstate="collapsed" desc="Подпрограмма: устранение дребезга кнопки">
DEBOUNCE_SW:
000159 930f push r16
00015a 931f push r17
00015b 932f push r18
00015c e02a ldi r18, 10
_loop_2:
00015d ef1f ldi r17, 255
_loop_0:
00015e ef0f ldi r16, 255
_dec_0:
00015f 950a dec r16
000160 f7f1 brne _dec_0
_loop_1:
000161 951a dec r17
000162 f7d9 brne _loop_0
_loop_3:
000163 952a dec r18
000164 f7c1 brne _loop_2
000165 912f pop r18
000166 911f pop r17
000167 910f pop r16
000168 9508 ret//</editor-fold>
//<editor-fold defaultstate="collapsed" desc="Подпрограмма: задержка">
DELAY:
000169 930f push r16
00016a 931f push r17
00016b ef0f ldi r16, 255
_DELAY_1:
00016c ef1f ldi r17, 255
_DELAY_2:
00016d 951a dec r17
00016e 0000 nop
00016f 0000 nop
000170 0000 nop
000171 f7d9 brne _DELAY_2
000172 950a dec r16
000173 f7c1 brne _DELAY_1
000174 911f pop r17
000175 910f pop r16
000176 9508 ret //</editor-fold>
//<editor-fold defaultstate="collapsed" desc="Символы для индикатора">
DISPLAY_SYMBOLS:
; HGFEDCBA HGFEDCBA
000177 f9c0 .DB 0b11000000, 0b11111001 ; 0, 1
000178 b0a4 .DB 0b10100100, 0b10110000 ; 2, 3
000179 9299 .DB 0b10011001, 0b10010010 ; 4, 5
00017a f882 .DB 0b10000010, 0b11111000 ; 6, 7
00017b 9080 .DB 0b10000000, 0b10010000 ; 8, 9
00017c bf9c .DB 0b10011100, 0b10111111 ; °, -//</editor-fold>
//</editor-fold>
//<editor-fold defaultstate="collapsed" desc="Сегмент EEPROM">
; **** СЕГМЕНТ EEPROM ********************************************
; .ESEG
; INFO: .DB "AVR Thermostat. Written by Sergey Yarkov 22.01.2023"
;</editor-fold>
RESOURCE USE INFORMATION
------------------------
Notice:
The register and instruction counts are symbol table hit counts,
and hence implicitly used resources are not counted, eg, the
'lpm' instruction without operands implicitly uses r0 and z,
none of which are counted.
x,y,z are separate entities in the symbol table and are
counted separately from r26..r31 here.
.dseg memory usage only counts static data declared with .byte
"ATtiny2313A" register use summary:
x : 2 y : 0 z : 1 r0 : 2 r1 : 2 r2 : 0 r3 : 0 r4 : 0
r5 : 0 r6 : 0 r7 : 0 r8 : 5 r9 : 0 r10: 0 r11: 0 r12: 0
r13: 0 r14: 5 r15: 5 r16: 75 r17: 40 r18: 15 r19: 14 r20: 25
r21: 8 r22: 0 r23: 4 r24: 6 r25: 4 r26: 3 r27: 3 r28: 0
r29: 0 r30: 2 r31: 2
Registers used: 20 out of 35 (57.1%)
"ATtiny2313A" instruction use summary:
.lds : 0 .sts : 0 adc : 2 add : 2 adiw : 1 and : 0
andi : 0 asr : 0 bclr : 0 bld : 0 brbc : 0 brbs : 0
brcc : 3 brcs : 1 break : 0 breq : 0 brge : 1 brhc : 0
brhs : 0 brid : 0 brie : 0 brlo : 0 brlt : 0 brmi : 0
brne : 16 brpl : 0 brsh : 0 brtc : 0 brts : 0 brvc : 0
brvs : 0 bset : 0 bst : 0 cbi : 18 cbr : 1 clc : 1
clh : 0 cli : 3 cln : 0 clr : 6 cls : 0 clt : 0
clv : 0 clz : 0 com : 0 cp : 0 cpc : 0 cpi : 8
cpse : 0 dec : 9 eor : 0 icall : 0 ijmp : 0 in : 1
inc : 1 ld : 0 ldd : 0 ldi : 58 lds : 13 lpm : 2
lsl : 0 lsr : 6 mov : 8 movw : 0 neg : 0 nop : 4
or : 0 ori : 0 out : 12 pop : 20 push : 20 rcall : 38
ret : 14 reti : 1 rjmp : 9 rol : 4 ror : 4 sbc : 1
sbci : 1 sbi : 10 sbic : 2 sbis : 4 sbiw : 1 sbr : 2
sbrc : 1 sbrs : 1 sec : 1 seh : 0 sei : 3 sen : 0
ser : 0 ses : 0 set : 0 sev : 0 sez : 0 sleep : 0
spm : 0 st : 2 std : 0 sts : 16 sub : 2 subi : 1
swap : 0 tst : 0 wdr : 0
Instructions used: 46 out of 105 (43.8%)
"ATtiny2313A" memory use summary [bytes]:
Segment Begin End Code Data Used Size Use%
---------------------------------------------------------------
[.cseg] 0x000000 0x0002fa 726 12 738 2048 36.0%
[.dseg] 0x000060 0x00006c 0 12 12 128 9.4%
[.eseg] 0x000000 0x000000 0 0 0 128 0.0%
Assembly complete, 0 errors, 6 warnings
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