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https://github.com/sergeyyarkov/attiny2313a_thermostat.git
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54 lines
1.6 KiB
NASM
54 lines
1.6 KiB
NASM
;***************************************************************************
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;*
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;* "div16u" - 16/16 Bit Unsigned Division
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;*
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;* This subroutine divides the two 16-bit numbers
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;* "dd8uH:dd8uL" (dividend) and "dv16uH:dv16uL" (divisor).
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;* The result is placed in "dres16uH:dres16uL" and the remainder in
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;* "drem16uH:drem16uL".
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;*
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;* Number of words :19
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;* Number of cycles :235/251 (Min/Max)
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;* Low registers used :2 (drem16uL,drem16uH)
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;* High registers used :5 (dres16uL/dd16uL,dres16uH/dd16uH,dv16uL,dv16uH,
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;* dcnt16u)
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;*
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;***************************************************************************
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;***** Subroutine Register Variables
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.def drem16uL=r14
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.def drem16uH=r15
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.def dres16uL=r16
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.def dres16uH=r17
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.def dd16uL =r16
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.def dd16uH =r17
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.def dv16uL =r18
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.def dv16uH =r19
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.def dcnt16u =r20
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;***** Code
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div16u:
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clr drem16uL ; clear remainder Low byte
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sub drem16uH,drem16uH ; clear remainder High byte and carry
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ldi dcnt16u,17 ; init loop counter
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d16u_1:
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rol dd16uL ; shift left dividend
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rol dd16uH
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dec dcnt16u ; decrement counter
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brne d16u_2 ; if done
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ret ; return
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d16u_2:
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rol drem16uL ; shift dividend into remainder
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rol drem16uH
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sub drem16uL,dv16uL ; remainder = remainder - divisor
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sbc drem16uH,dv16uH
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brcc d16u_3 ; if result negative
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add drem16uL,dv16uL ; restore remainder
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adc drem16uH,dv16uH
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clc ; clear carry to be shifted into result
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rjmp d16u_1 ; else
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d16u_3:
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sec ; set carry to be shifted into result
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rjmp d16u_1 |