bubble/attiny24a_memory-led-game
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some refactor

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This commit is contained in:
Sergey Yarkov 2021-11-27 03:30:51 +03:00
parent 35beeb8709
commit 53952052c5
3 changed files with 57 additions and 49 deletions
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26
firmware.asm
View File

@ -15,8 +15,8 @@
;
; Registers
.def temp_r = r16
.def mcu_state_r = r17
.def temp_r = r16 ; General register A.
.def mcu_state_r = r17 ; Current state of MCU. This register will be compared in an main loop.
;
; LEDS constants
@ -70,7 +70,7 @@
.org SRAM_START
;
; MCU Global states
; MCU Global states addresses
CURRENT_STATE_ADDRESS: .byte 0x01
PREVIOUS_STATE_ADDRESS: .byte 0x01
@ -129,12 +129,12 @@ loop: ; Program loop
cpi mcu_state_r, INIT_STATE
brne showing
rcall MCU_Init
set_state SHOWING_STATE
set_state SHOWING_STATE
showing: ; Showing state
cpi mcu_state_r, SHOWING_STATE
brne polling
rcall show_sequence
; set_state POLLING_STATE
set_state POLLING_STATE
polling: ; Polling state
cpi mcu_state_r, POLLING_STATE
brne completion
@ -145,7 +145,7 @@ loop: ; Program loop
brne led_off_1
led_on_1:
sbi LED_PORT, 0
sbi BUZZ_DIR, BUZZ_PIN
; buzzer_on
outi OCR0A, 142
rjmp led_2
led_off_1:
@ -155,7 +155,7 @@ loop: ; Program loop
brne led_off_2
led_on_2:
sbi LED_PORT, 1
sbi BUZZ_DIR, BUZZ_PIN
; buzzer_on
outi OCR0A, 71
rjmp led_3
led_off_2:
@ -165,7 +165,7 @@ loop: ; Program loop
brne led_off_3
led_on_3:
sbi LED_PORT, 2
sbi BUZZ_DIR, BUZZ_PIN
; buzzer_on
outi OCR0A, 105
rjmp led_4
led_off_3:
@ -175,7 +175,7 @@ loop: ; Program loop
brne led_off_4
led_on_4:
sbi LED_PORT, 3
sbi BUZZ_DIR, BUZZ_PIN
; buzzer_on
outi OCR0A, 80
rjmp polling
led_off_4:
@ -186,7 +186,7 @@ loop: ; Program loop
default: ; Do nothing
rjmp loop
show_sequence: ; Show sequence of led
show_sequence: ; Generate sequence of leds and store in SRAM and then set POLLING state
nop
ret
@ -239,6 +239,7 @@ MCU_Init:
rcall init_interrupts
rcall init_buzzer
rcall delay_before_start ; Init MCU and delay before start main program
sei ; Enable Global Interrupts
ret
delay_before_start:
@ -247,7 +248,7 @@ delay_before_start:
rcall effect_1
dec temp_r
brne _init_loop_loading
rcall delay_1s
rcall delay_1s ; Wait 1 sec before start main program
clr temp_r
ret
@ -263,8 +264,6 @@ init_interrupts:
out PCMSK0, temp_r
clr temp_r
sei ; Enable Global Interrupts
ret
init_buzzer:
@ -279,7 +278,6 @@ init_buzzer:
ldi temp_r, (1<<CS01) ; Prescale on 8
out TCCR0B, temp_r
ret
init_ports: ; Init MCU ports

54
firmware.hex
View File

@ -1,31 +1,31 @@
:020000020000FC
:100000001CC018950EC01895189518951895189538
:100010001895189518951895189518951895189578
:1000200018951F932F932FB719B3107F98D0109363
:1000300062002FBF2F911F9118950FED0DBF1093E8
:1000400061000F9301E0009360000F911091600038
:10005000113041F462D0109361000F9302E00093DD
:1000600060000F91123009F42FD0133051F5209118
:100070006200203E39F4D89ABA9A0F930EE806BF70
:100080000F9101C0D898203D39F4D99ABA9A0F93AC
:1000900007E406BF0F9101C0D998203B39F4DA9AE2
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:1000C000DB98143001F4C2CF000008951F932F93E2
:1000D0003F934F934BB30F9301EF0BBB0F913FD067
:1000E00011E033E020EF110F210F2BBB38D03A95F0
:1000F000C9F70F9308EF0BBB0F9131D018E033E035
:1001000020EF1695210F2BBB2AD03A95C9F74BBB90
:100110004F913F912F911F9108951AD00AD010D07E
:1001200001D0089506E0D2DF0A95E9F724D0002730
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:1000200018951F932F932FB719B3107F9CD010935F
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:1001B00020627920536572676579205961726B6F8F
:0C01C000762032372E30392E32303231AA
:00000001FF

26
macros.asm
View File

@ -4,9 +4,11 @@
.macro init_stack_p
ldi @0, low(@1)
out SPL, @0
clr @0
.ifdef SPH
ldi @0, high(RAMEND)
out SPH, @0
clr @0
.endif
.endm
@ -15,10 +17,10 @@
; @0 - I/O Register
; @1 - Data to write
.macro outi
push r16
ldi r16, @1
out @0, r16
pop r16
push temp_r
ldi temp_r, @1
out @0, temp_r
pop temp_r
.endm
;
@ -26,10 +28,10 @@
; @0 - SRAM Address
; @1 - Data to write
.macro stsi
push r16
ldi r16, @1
sts @0, r16
pop r16
push temp_r
ldi temp_r, @1
sts @0, temp_r
pop temp_r
.endm
;
@ -38,4 +40,12 @@
.macro set_state
sts PREVIOUS_STATE_ADDRESS, mcu_state_r ; Write previous state to SRAM
stsi CURRENT_STATE_ADDRESS, @0
.endm
.macro buzzer_on
sbi BUZZ_DIR, BUZZ_PIN
.endm
.macro buzzer_off
cbi BUZZ_DIR, BUZZ_PIN
.endm