some refactor

This commit is contained in:
Sergey Yarkov 2021-11-27 03:30:51 +03:00
parent 35beeb8709
commit 53952052c5
3 changed files with 57 additions and 49 deletions

View File

@ -15,8 +15,8 @@
; ;
; Registers ; Registers
.def temp_r = r16 .def temp_r = r16 ; General register A.
.def mcu_state_r = r17 .def mcu_state_r = r17 ; Current state of MCU. This register will be compared in an main loop.
; ;
; LEDS constants ; LEDS constants
@ -70,7 +70,7 @@
.org SRAM_START .org SRAM_START
; ;
; MCU Global states ; MCU Global states addresses
CURRENT_STATE_ADDRESS: .byte 0x01 CURRENT_STATE_ADDRESS: .byte 0x01
PREVIOUS_STATE_ADDRESS: .byte 0x01 PREVIOUS_STATE_ADDRESS: .byte 0x01
@ -134,7 +134,7 @@ loop: ; Program loop
cpi mcu_state_r, SHOWING_STATE cpi mcu_state_r, SHOWING_STATE
brne polling brne polling
rcall show_sequence rcall show_sequence
; set_state POLLING_STATE set_state POLLING_STATE
polling: ; Polling state polling: ; Polling state
cpi mcu_state_r, POLLING_STATE cpi mcu_state_r, POLLING_STATE
brne completion brne completion
@ -145,7 +145,7 @@ loop: ; Program loop
brne led_off_1 brne led_off_1
led_on_1: led_on_1:
sbi LED_PORT, 0 sbi LED_PORT, 0
sbi BUZZ_DIR, BUZZ_PIN ; buzzer_on
outi OCR0A, 142 outi OCR0A, 142
rjmp led_2 rjmp led_2
led_off_1: led_off_1:
@ -155,7 +155,7 @@ loop: ; Program loop
brne led_off_2 brne led_off_2
led_on_2: led_on_2:
sbi LED_PORT, 1 sbi LED_PORT, 1
sbi BUZZ_DIR, BUZZ_PIN ; buzzer_on
outi OCR0A, 71 outi OCR0A, 71
rjmp led_3 rjmp led_3
led_off_2: led_off_2:
@ -165,7 +165,7 @@ loop: ; Program loop
brne led_off_3 brne led_off_3
led_on_3: led_on_3:
sbi LED_PORT, 2 sbi LED_PORT, 2
sbi BUZZ_DIR, BUZZ_PIN ; buzzer_on
outi OCR0A, 105 outi OCR0A, 105
rjmp led_4 rjmp led_4
led_off_3: led_off_3:
@ -175,7 +175,7 @@ loop: ; Program loop
brne led_off_4 brne led_off_4
led_on_4: led_on_4:
sbi LED_PORT, 3 sbi LED_PORT, 3
sbi BUZZ_DIR, BUZZ_PIN ; buzzer_on
outi OCR0A, 80 outi OCR0A, 80
rjmp polling rjmp polling
led_off_4: led_off_4:
@ -186,7 +186,7 @@ loop: ; Program loop
default: ; Do nothing default: ; Do nothing
rjmp loop rjmp loop
show_sequence: ; Show sequence of led show_sequence: ; Generate sequence of leds and store in SRAM and then set POLLING state
nop nop
ret ret
@ -239,6 +239,7 @@ MCU_Init:
rcall init_interrupts rcall init_interrupts
rcall init_buzzer rcall init_buzzer
rcall delay_before_start ; Init MCU and delay before start main program rcall delay_before_start ; Init MCU and delay before start main program
sei ; Enable Global Interrupts
ret ret
delay_before_start: delay_before_start:
@ -247,7 +248,7 @@ delay_before_start:
rcall effect_1 rcall effect_1
dec temp_r dec temp_r
brne _init_loop_loading brne _init_loop_loading
rcall delay_1s rcall delay_1s ; Wait 1 sec before start main program
clr temp_r clr temp_r
ret ret
@ -263,8 +264,6 @@ init_interrupts:
out PCMSK0, temp_r out PCMSK0, temp_r
clr temp_r clr temp_r
sei ; Enable Global Interrupts
ret ret
init_buzzer: init_buzzer:
@ -279,7 +278,6 @@ init_buzzer:
ldi temp_r, (1<<CS01) ; Prescale on 8 ldi temp_r, (1<<CS01) ; Prescale on 8
out TCCR0B, temp_r out TCCR0B, temp_r
ret ret
init_ports: ; Init MCU ports init_ports: ; Init MCU ports

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@ -1,31 +1,31 @@
:020000020000FC :020000020000FC
:100000001CC018950EC01895189518951895189538 :100000001CC018950EC01895189518951895189538
:100010001895189518951895189518951895189578 :100010001895189518951895189518951895189578
:1000200018951F932F932FB719B3107F98D0109363 :1000200018951F932F932FB719B3107F9CD010935F
:1000300062002FBF2F911F9118950FED0DBF1093E8 :1000300062002FBF2F911F9118950FED0DBF002764
:1000400061000F9301E0009360000F911091600038 :10004000109361000F9301E0009360000F911091F5
:10005000113041F462D0109361000F9302E00093DD :100050006000113041F465D0109361000F9302E00D
:1000600060000F91123009F42FD0133051F5209118 :10006000009360000F91123041F432D01093610080
:100070006200203E39F4D89ABA9A0F930EE806BF70 :100070000F9303E0009360000F91133031F520914E
:100080000F9101C0D898203D39F4D99ABA9A0F93AC :100080006200203E31F4D89A0F930EE806BF0F911C
:1000900007E406BF0F9101C0D998203B39F4DA9AE2 :1000900001C0D898203D31F4D99A0F9307E406BFE8
:1000A000BA9A0F9309E606BF0F9101C0DA9820377C :1000A0000F9101C0D998203B31F4DA9A0F9309E6F9
:1000B00039F4DB9ABA9A0F9300E506BF0F91D5CFBA :1000B00006BF0F9101C0DA98203731F4DB9A0F9315
:1000C000DB98143001F4C2CF000008951F932F93E2 :1000C00000E506BF0F91D9CFDB98143001F4BFCF04
:1000D0003F934F934BB30F9301EF0BBB0F913FD067 :1000D000000008951F932F933F934F934BB30F93BB
:1000E00011E033E020EF110F210F2BBB38D03A95F0 :1000E00001EF0BBB0F913FD011E033E020EF110F78
:1000F000C9F70F9308EF0BBB0F9131D018E033E035 :1000F000210F2BBB38D03A95C9F70F9308EF0BBBF4
:1001000020EF1695210F2BBB2AD03A95C9F74BBB90 :100100000F9131D018E033E020EF1695210F2BBB73
:100110004F913F912F911F9108951AD00AD010D07E :100110002AD03A95C9F74BBB4F913F912F911F9130
:1001200001D0089506E0D2DF0A95E9F724D0002730 :1001200008951AD00BD010D002D07894089506E02C
:10013000089500E10BBF00EF02BB002778940895FB :10013000D1DF0A95E9F723D00027089500E10BBF2E
:10014000BA9802E400BF0EE006BF02E003BF0895C4 :1001400000EF02BB00270895BA9802E400BF0EE05A
:100150000FE00ABB02950BBBBA9AC29808952F9381 :1001500006BF02E003BF08950FE00ABB02950BBB88
:100160003F9321E43FEE3A95F1F72A95E1F700003D :10016000BA9AC29808952F933F9321E43FEE3A95AF
:100170003F912F9108958F939F9324E683EC99E00C :10017000F1F72A95E1F700003F912F9108958F93B1
:100180000197F1F72A95D1F724E69F918F91089571 :100180009F9324E683EC99E00197F1F72A95D1F744
:100190004D656D6F7279206C65642067616D652EA9 :1001900024E69F918F9108954D656D6F7279206C63
:1001A000205772697474656E206279205365726796 :1001A00065642067616D652E205772697474656E91
:1001B0006579205961726B6F762032372E30392E77 :1001B00020627920536572676579205961726B6F8F
:0401C0003230323176 :0C01C000762032372E30392E32303231AA
:00000001FF :00000001FF

View File

@ -4,9 +4,11 @@
.macro init_stack_p .macro init_stack_p
ldi @0, low(@1) ldi @0, low(@1)
out SPL, @0 out SPL, @0
clr @0
.ifdef SPH .ifdef SPH
ldi @0, high(RAMEND) ldi @0, high(RAMEND)
out SPH, @0 out SPH, @0
clr @0
.endif .endif
.endm .endm
@ -15,10 +17,10 @@
; @0 - I/O Register ; @0 - I/O Register
; @1 - Data to write ; @1 - Data to write
.macro outi .macro outi
push r16 push temp_r
ldi r16, @1 ldi temp_r, @1
out @0, r16 out @0, temp_r
pop r16 pop temp_r
.endm .endm
; ;
@ -26,10 +28,10 @@
; @0 - SRAM Address ; @0 - SRAM Address
; @1 - Data to write ; @1 - Data to write
.macro stsi .macro stsi
push r16 push temp_r
ldi r16, @1 ldi temp_r, @1
sts @0, r16 sts @0, temp_r
pop r16 pop temp_r
.endm .endm
; ;
@ -39,3 +41,11 @@
sts PREVIOUS_STATE_ADDRESS, mcu_state_r ; Write previous state to SRAM sts PREVIOUS_STATE_ADDRESS, mcu_state_r ; Write previous state to SRAM
stsi CURRENT_STATE_ADDRESS, @0 stsi CURRENT_STATE_ADDRESS, @0
.endm .endm
.macro buzzer_on
sbi BUZZ_DIR, BUZZ_PIN
.endm
.macro buzzer_off
cbi BUZZ_DIR, BUZZ_PIN
.endm