diff --git a/firmware.asm b/firmware.asm index 6af30c3..7526887 100644 --- a/firmware.asm +++ b/firmware.asm @@ -54,7 +54,6 @@ .equ INIT_STATE = 0x01 .equ SHOWING_STATE = 0x02 .equ POLLING_STATE = 0x03 -.equ COMPLETION_STATE = 0x04 ; ; SW Flags states constants @@ -194,7 +193,7 @@ loop: ; Program loop set_state POLLING_STATE polling: ; Polling state cpi mcu_state_r, POLLING_STATE - brne completion + brne default btn_1: lds r18, SW_FLAGS_ADDRESS cpi r18, SW_FLAG_1 @@ -243,9 +242,6 @@ loop: ; Program loop cbi LED_PORT, 3 cbi BUZZ_DIR, BUZZ_PIN rjmp btn_4 - completion: ; Reset delay counter, set MCU state to SHOWING - cpi mcu_state_r, COMPLETION_STATE - brne default default: rcall OCR0A_reset rjmp loop diff --git a/firmware.hex b/firmware.hex index 787a230..808d49c 100644 --- a/firmware.hex +++ b/firmware.hex @@ -2,55 +2,55 @@ :100000003EC018950EC01895189518951895189516 :1000100018951895189515C0189518951895189550 :1000200018951F932F932FB710916000133031F460 -:1000300019B3107F62D1109362002FBF2F911F91CF +:1000300019B3107F60D1109362002FBF2F911F91D1 :1000400018957F937FB702C008EA52B7052702953B -:10005000500F7FBF7F9118953BD12AD12FD13FEF11 +:10005000500F7FBF7F91189539D128D12DD13FEF17 :1000600041E0A4E0AA2EFF27E0E802D078940895AA -:1000700073E0F5D07A95E9F74CD1772708950FED25 +:1000700073E0F3D07A95E9F74AD1772708950FED29 :100080000DBF0027109361000F9301E00093600003 :100090000F9110916000113041F4DEDF1093610088 -:1000A0000F9302E0009360000F91123041F48BD067 +:1000A0000F9302E0009360000F91123041F489D069 :1000B000109361000F9303E0009360000F911330E1 :1000C000C1F520916200203E51F40F930EE806BF67 -:1000D0000F91D89ABA9A31D0D898BA98F2CF209185 +:1000D0000F91D89ABA9A2FD0D898BA98F2CF209187 :1000E0006200203D51F40F9307E406BF0F91D99AA7 -:1000F000BA9A23D0D998BA98F2CF20916200203BC7 -:1001000051F40F9309E606BF0F91DA9ABA9A15D007 -:10011000DA98BA98F2CF20916200203761F40F93F9 -:1001200000E506BF0F91DB9ABA9A07D0DB98BA9820 -:10013000F2CF143001F488D0ACCF2F93DED0DDD0D5 -:10014000DCD0A9B39A2FA07F9F70AA27A09362004A -:100150008191981729F42A2D241739F0439516C058 -:100160007ED03FEFA4E0AA95AA2E2F91FF27E0E8CA -:10017000BA9800EF0BBBCDD0109361000F9302E053 -:10018000009360000F9141E0A39408952F9108958A -:1001900008957A2DDD27C0E8B0D0652F663430F0A1 -:1001A0006C3830F0683C30F06F3F30F0A1E005C0B3 -:1001B000A2E003C0A4E001C0A8E0A9937A95703042 -:1001C00059F700000895E5DF7A2DDD27C0E870308B -:1001D000C1F1A991A13031F0A23079F0A430C1F081 -:1001E000A83009F10F930EE806BF0F91D89ABA9A7A -:1001F00076D0D898BA9828D020C00F9307E406BFCD -:100200000F91D99ABA9A6BD0D998BA981DD015C0C7 -:100210000F9309E606BF0F91DA9ABA9A60D0DA987E -:10022000BA9812D00AC00F9300E506BF0F91DB9A6F -:10023000BA9A55D0DB98BA9807D051D07A957030D9 -:1002400031F607D05AD008957F937FEF76BF7F9124 -:1002500008953A50383208F008953FEF08951F93FB -:100260002F933F934F93F8944BB30F9301EF0BBB36 -:100270000F9143D011E033E020EF110F210F2BBB82 -:100280003CD03A95C9F70F9308EF0BBB0F9135D0CF -:1002900018E033E020EF1695210F2BBB2ED03A95B6 -:1002A000C9F778944BBB4F913F912F911F910895BF -:1002B00000E10BBF00EF02BB00270895BA9802E4EB -:1002C00000BF0FEF06BF02E003BF01E009BF0895C2 -:1002D0000FE00ABB02950BBBBA9AC29808952F9300 -:1002E0004F932FEF432F00002A95E9F700004A951E -:1002F000D1F700004F912F9108952F933F9321E460 -:100300003FEE3A95F1F72A95E1F700003F912F91E2 -:1003100008958F939F9324E683EC99E00197F1F77A -:100320002A95D1F724E69F918F9108954D656D6FC1 -:100330007279206C65642067616D652E2057726943 -:100340007474656E206279205365726765792059EF -:1003500061726B6F762032372E30392E3230323167 +:1000F000BA9A21D0D998BA98F2CF20916200203BC9 +:1001000051F40F9309E606BF0F91DA9ABA9A13D009 +:10011000DA98BA98F2CF20916200203751F40F9309 +:1001200000E506BF0F91DB9ABA9A05D0DB98BA9822 +:10013000F2CF88D0AECF2F93DED0DDD0DCD0A9B304 +:100140009A2FA07F9F70AA27A09362008191981791 +:1001500029F42A2D241739F0439516C07ED03FEF9D +:10016000A4E0AA95AA2E2F91FF27E0E8BA9800EF05 +:100170000BBBCDD0109361000F9302E000936000A1 +:100180000F9141E0A39408952F91089508957A2D39 +:10019000DD27C0E8B0D0652F663430F06C3830F021 +:1001A000683C30F06F3F30F0A1E005C0A2E003C032 +:1001B000A4E001C0A8E0A9937A95703059F7000037 +:1001C0000895E5DF7A2DDD27C0E87030C1F1A991EF +:1001D000A13031F0A23079F0A430C1F0A83009F19B +:1001E0000F930EE806BF0F91D89ABA9A76D0D89896 +:1001F000BA9828D020C00F9307E406BF0F91D99A70 +:10020000BA9A6BD0D998BA981DD015C00F9309E649 +:1002100006BF0F91DA9ABA9A60D0DA98BA9812D0DB +:100220000AC00F9300E506BF0F91DB9ABA9A55D02A +:10023000DB98BA9807D051D07A95703031F607D054 +:100240005AD008957F937FEF76BF7F9108953A50FB +:10025000383208F008953FEF08951F932F933F938E +:100260004F93F8944BB30F9301EF0BBB0F9143D017 +:1002700011E033E020EF110F210F2BBB3CD03A955A +:10028000C9F70F9308EF0BBB0F9135D018E033E09F +:1002900020EF1695210F2BBB2ED03A95C9F77894F5 +:1002A0004BBB4F913F912F911F91089500E10BBFE0 +:1002B00000EF02BB00270895BA9802E400BF0FEFD9 +:1002C00006BF02E003BF01E009BF08950FE00ABBCB +:1002D00002950BBBBA9AC29808952F934F932FEFB4 +:1002E000432F00002A95E9F700004A95D1F7000056 +:1002F0004F912F9108952F933F9321E43FEE3A952C +:10030000F1F72A95E1F700003F912F9108958F931F +:100310009F9324E683EC99E00197F1F72A95D1F7B2 +:1003200024E69F918F9108954D656D6F7279206CD1 +:1003300065642067616D652E205772697474656EFF +:1003400020627920536572676579205961726B6FFD +:0C035000762032372E30392E3230323118 :00000001FF diff --git a/firmware.lss b/firmware.lss index 3cf9bf2..22e0ea3 100644 --- a/firmware.lss +++ b/firmware.lss @@ -1,11 +1,11 @@ -AVRASM ver. 2.2.7 firmware.asm Wed May 04 20:17:39 2022 +AVRASM ver. 2.2.7 firmware.asm Wed May 04 20:21:53 2022 firmware.asm(13): Including file 'def.inc' firmware.asm(21): warning: Register r26 already defined by the .DEF directive -firmware.asm(74): Including file 'macros.asm' +firmware.asm(73): Including file 'macros.asm' firmware.asm(13): Including file 'def.inc' -firmware.asm(74): Including file 'macros.asm' +firmware.asm(73): Including file 'macros.asm' ; Project name: memory-led-game @@ -738,7 +738,6 @@ firmware.asm(74): Including file 'macros.asm' .equ INIT_STATE = 0x01 .equ SHOWING_STATE = 0x02 .equ POLLING_STATE = 0x03 - .equ COMPLETION_STATE = 0x04 ; ; SW Flags states constants @@ -893,7 +892,7 @@ firmware.asm(74): Including file 'macros.asm' 000017 f431 brne quit ; Do not change button flags unless in POLLING state of mcu 000018 b319 in r17, PINA ; Load current pins status of PINA 000019 7f10 andi r17, 0xf0 ; Get pins status of only buttons -00001a d162 rcall delay_50ms ; Delay for button +00001a d160 rcall delay_50ms ; Delay for button 00001b 9310 0062 sts SW_FLAGS_ADDRESS, r17 ; Update flag status in SRAM 00001d bf2f out SREG, r18 @@ -920,9 +919,9 @@ firmware.asm(74): Including file 'macros.asm' 00002b 9518 reti MCU_Init: ; This function executes once on start the main program -00002c d13b rcall init_ports -00002d d12a rcall init_interrupts -00002e d12f rcall init_buzzer +00002c d139 rcall init_ports +00002d d128 rcall init_interrupts +00002e d12d rcall init_buzzer ; ; Init important registers for game @@ -941,10 +940,10 @@ firmware.asm(74): Including file 'macros.asm' MCU_Delay: 000038 e073 ldi temp_r_b, 3 _init_loop_loading: -000039 d0f5 rcall effect_1 +000039 d0f3 rcall effect_1 00003a 957a dec temp_r_b 00003b f7e9 brne _init_loop_loading -00003c d14c rcall delay_1s +00003c d14a rcall delay_1s 00003d 2777 clr temp_r_b 00003e 9508 ret @@ -974,7 +973,7 @@ firmware.asm(74): Including file 'macros.asm' showing: ; Showing state 000055 3012 cpi mcu_state_r, SHOWING_STATE 000056 f441 brne polling -000057 d08b rcall show_sequence ; Generate sequence and save answer to SRAM +000057 d089 rcall show_sequence ; Generate sequence and save answer to SRAM 000058 9310 0061 00005a 930f 00005b e003 @@ -982,7 +981,7 @@ firmware.asm(74): Including file 'macros.asm' 00005e 910f set_state POLLING_STATE polling: ; Polling state 00005f 3013 cpi mcu_state_r, POLLING_STATE -000060 f5c1 brne completion +000060 f5c1 brne default btn_1: 000061 9120 0062 lds r18, SW_FLAGS_ADDRESS 000063 3e20 cpi r18, SW_FLAG_1 @@ -994,7 +993,7 @@ firmware.asm(74): Including file 'macros.asm' 000068 910f outi OCR0A, 142 000069 9ad8 sbi LED_PORT, 0 00006a 9aba sbi BUZZ_DIR, BUZZ_PIN -00006b d031 rcall btn_handler +00006b d02f rcall btn_handler 00006c 98d8 cbi LED_PORT, 0 00006d 98ba cbi BUZZ_DIR, BUZZ_PIN 00006e cff2 rjmp btn_1 @@ -1009,7 +1008,7 @@ firmware.asm(74): Including file 'macros.asm' 000076 910f outi OCR0A, 71 000077 9ad9 sbi LED_PORT, 1 000078 9aba sbi BUZZ_DIR, BUZZ_PIN -000079 d023 rcall btn_handler +000079 d021 rcall btn_handler 00007a 98d9 cbi LED_PORT, 1 00007b 98ba cbi BUZZ_DIR, BUZZ_PIN 00007c cff2 rjmp btn_2 @@ -1024,14 +1023,14 @@ firmware.asm(74): Including file 'macros.asm' 000084 910f outi OCR0A, 105 000085 9ada sbi LED_PORT, 2 000086 9aba sbi BUZZ_DIR, BUZZ_PIN -000087 d015 rcall btn_handler +000087 d013 rcall btn_handler 000088 98da cbi LED_PORT, 2 000089 98ba cbi BUZZ_DIR, BUZZ_PIN 00008a cff2 rjmp btn_3 btn_4: 00008b 9120 0062 lds r18, SW_FLAGS_ADDRESS 00008d 3720 cpi r18, SW_FLAG_4 -00008e f461 brne default +00008e f451 brne default led_on_4: 00008f 930f 000090 e500 @@ -1039,378 +1038,375 @@ firmware.asm(74): Including file 'macros.asm' 000092 910f outi OCR0A, 80 000093 9adb sbi LED_PORT, 3 000094 9aba sbi BUZZ_DIR, BUZZ_PIN -000095 d007 rcall btn_handler +000095 d005 rcall btn_handler 000096 98db cbi LED_PORT, 3 000097 98ba cbi BUZZ_DIR, BUZZ_PIN 000098 cff2 rjmp btn_4 - completion: ; Reset delay counter, set MCU state to SHOWING -000099 3014 cpi mcu_state_r, COMPLETION_STATE -00009a f401 brne default default: -00009b d088 rcall OCR0A_reset -00009c cfac rjmp loop +000099 d088 rcall OCR0A_reset +00009a cfae rjmp loop btn_handler: ; Check the input value with answer in SRAM -00009d 932f push r18 -00009e d0de rcall delay_50ms -00009f d0dd rcall delay_50ms -0000a0 d0dc rcall delay_50ms -0000a1 b3a9 in temp_r_c, PINA -0000a2 2f9a mov r25, temp_r_c -0000a3 7fa0 andi temp_r_c, 0xf0 -0000a4 709f andi r25, 0x0f -0000a5 27aa clr temp_r_c -0000a6 93a0 0062 sts SW_FLAGS_ADDRESS, temp_r_c +00009b 932f push r18 +00009c d0de rcall delay_50ms +00009d d0dd rcall delay_50ms +00009e d0dc rcall delay_50ms +00009f b3a9 in temp_r_c, PINA +0000a0 2f9a mov r25, temp_r_c +0000a1 7fa0 andi temp_r_c, 0xf0 +0000a2 709f andi r25, 0x0f +0000a3 27aa clr temp_r_c +0000a4 93a0 0062 sts SW_FLAGS_ADDRESS, temp_r_c -0000a8 9181 ld r24, Z+ -0000a9 1798 cp r25, r24 ; Check answer -0000aa f429 brne _game_over ; Game over +0000a6 9181 ld r24, Z+ +0000a7 1798 cp r25, r24 ; Check answer +0000a8 f429 brne _game_over ; Game over -0000ab 2d2a mov r18, seq_length_r -0000ac 1724 cp r18, poll_step_r -0000ad f039 breq _btn_handler_exit_state +0000a9 2d2a mov r18, seq_length_r +0000aa 1724 cp r18, poll_step_r +0000ab f039 breq _btn_handler_exit_state -0000ae 9543 inc poll_step_r +0000ac 9543 inc poll_step_r -0000af c016 rjmp _btn_handler_exit +0000ad c016 rjmp _btn_handler_exit _game_over: -0000b0 d07e rcall effect_1 -0000b1 ef3f ldi delay_counter_r, 0xff -0000b2 e0a4 ldi temp_r_c, SEQ_LENGTH -0000b3 95aa dec temp_r_c -0000b4 2eaa mov seq_length_r, temp_r_c +0000ae d07e rcall effect_1 +0000af ef3f ldi delay_counter_r, 0xff +0000b0 e0a4 ldi temp_r_c, SEQ_LENGTH +0000b1 95aa dec temp_r_c +0000b2 2eaa mov seq_length_r, temp_r_c _btn_handler_exit_state: -0000b5 912f pop r18 -0000b6 27ff clr ZH -0000b7 e8e0 ldi ZL, $80 -0000b8 98ba cbi BUZZ_DIR, BUZZ_PIN -0000b9 ef00 ldi temp_r, 0xf0 -0000ba bb0b out LED_PORT, temp_r -0000bb d0cd rcall delay_1s -0000bc 9310 0061 -0000be 930f -0000bf e002 -0000c0 9300 0060 -0000c2 910f set_state SHOWING_STATE -0000c3 e041 ldi poll_step_r, 1 -0000c4 94a3 inc seq_length_r -0000c5 9508 ret +0000b3 912f pop r18 +0000b4 27ff clr ZH +0000b5 e8e0 ldi ZL, $80 +0000b6 98ba cbi BUZZ_DIR, BUZZ_PIN +0000b7 ef00 ldi temp_r, 0xf0 +0000b8 bb0b out LED_PORT, temp_r +0000b9 d0cd rcall delay_1s +0000ba 9310 0061 +0000bc 930f +0000bd e002 +0000be 9300 0060 +0000c0 910f set_state SHOWING_STATE +0000c1 e041 ldi poll_step_r, 1 +0000c2 94a3 inc seq_length_r +0000c3 9508 ret _btn_handler_exit: -0000c6 912f pop r18 -0000c7 9508 ret -0000c8 9508 ret +0000c4 912f pop r18 +0000c5 9508 ret +0000c6 9508 ret gen_ran_seq: ; Generate random sequence of bytes for leds and save answer to SRAM -0000c9 2d7a mov temp_r_b, seq_length_r -0000ca 27dd clr YH -0000cb e8c0 ldi YL, $80 +0000c7 2d7a mov temp_r_b, seq_length_r +0000c8 27dd clr YH +0000c9 e8c0 ldi YL, $80 _gen_ran_loop: -0000cc d0b0 rcall delay_50ms ; Delay is required! -0000cd 2f65 mov r22, r21 +0000ca d0b0 rcall delay_50ms ; Delay is required! +0000cb 2f65 mov r22, r21 -0000ce 3466 cpi r22, 70 -0000cf f030 brlo _gen_answ_1 +0000cc 3466 cpi r22, 70 +0000cd f030 brlo _gen_answ_1 -0000d0 386c cpi r22, 140 -0000d1 f030 brlo _gen_answ_2 +0000ce 386c cpi r22, 140 +0000cf f030 brlo _gen_answ_2 -0000d2 3c68 cpi r22, 200 -0000d3 f030 brlo _gen_answ_3 +0000d0 3c68 cpi r22, 200 +0000d1 f030 brlo _gen_answ_3 -0000d4 3f6f cpi r22, 255 -0000d5 f030 brlo _gen_answ_4 +0000d2 3f6f cpi r22, 255 +0000d3 f030 brlo _gen_answ_4 _gen_answ_1: -0000d6 e0a1 ldi temp_r_c, 0x01 -0000d7 c005 rjmp _gen_ran_write +0000d4 e0a1 ldi temp_r_c, 0x01 +0000d5 c005 rjmp _gen_ran_write _gen_answ_2: -0000d8 e0a2 ldi temp_r_c, 0x02 -0000d9 c003 rjmp _gen_ran_write +0000d6 e0a2 ldi temp_r_c, 0x02 +0000d7 c003 rjmp _gen_ran_write _gen_answ_3: -0000da e0a4 ldi temp_r_c, 0x04 -0000db c001 rjmp _gen_ran_write +0000d8 e0a4 ldi temp_r_c, 0x04 +0000d9 c001 rjmp _gen_ran_write _gen_answ_4: -0000dc e0a8 ldi temp_r_c, 0x08 +0000da e0a8 ldi temp_r_c, 0x08 _gen_ran_write: -0000dd 93a9 st Y+, temp_r_c -0000de 957a dec temp_r_b -0000df 3070 cpi temp_r_b, 0 -0000e0 f759 brne _gen_ran_loop -0000e1 0000 nop -0000e2 9508 ret +0000db 93a9 st Y+, temp_r_c +0000dc 957a dec temp_r_b +0000dd 3070 cpi temp_r_b, 0 +0000de f759 brne _gen_ran_loop +0000df 0000 nop +0000e0 9508 ret show_sequence: -0000e3 dfe5 rcall gen_ran_seq ; Answer stored in SRAM in addr $80:{SEQ_LENGTH} +0000e1 dfe5 rcall gen_ran_seq ; Answer stored in SRAM in addr $80:{SEQ_LENGTH} show_start: -0000e4 2d7a mov temp_r_b, seq_length_r +0000e2 2d7a mov temp_r_b, seq_length_r -0000e5 27dd clr YH -0000e6 e8c0 ldi YL, $80 +0000e3 27dd clr YH +0000e4 e8c0 ldi YL, $80 _sequence_loop: -0000e7 3070 cpi temp_r_b, 0 -0000e8 f1c1 breq _seq_quit +0000e5 3070 cpi temp_r_b, 0 +0000e6 f1c1 breq _seq_quit -0000e9 91a9 ld temp_r_c, Y+ -0000ea 30a1 cpi temp_r_c, 0x01 -0000eb f031 breq beep_1 +0000e7 91a9 ld temp_r_c, Y+ +0000e8 30a1 cpi temp_r_c, 0x01 +0000e9 f031 breq beep_1 -0000ec 30a2 cpi temp_r_c, 0x02 -0000ed f079 breq beep_2 +0000ea 30a2 cpi temp_r_c, 0x02 +0000eb f079 breq beep_2 -0000ee 30a4 cpi temp_r_c, 0x04 -0000ef f0c1 breq beep_3 +0000ec 30a4 cpi temp_r_c, 0x04 +0000ed f0c1 breq beep_3 -0000f0 30a8 cpi temp_r_c, 0x08 -0000f1 f109 breq beep_4 +0000ee 30a8 cpi temp_r_c, 0x08 +0000ef f109 breq beep_4 beep_1: -0000f2 930f -0000f3 e80e -0000f4 bf06 -0000f5 910f -0000f6 9ad8 -0000f7 9aba -0000f8 d076 -0000f9 98d8 -0000fa 98ba beep_led_1 -0000fb d028 rcall OCR0A_reset -0000fc c020 rjmp beep_quit +0000f0 930f +0000f1 e80e +0000f2 bf06 +0000f3 910f +0000f4 9ad8 +0000f5 9aba +0000f6 d076 +0000f7 98d8 +0000f8 98ba beep_led_1 +0000f9 d028 rcall OCR0A_reset +0000fa c020 rjmp beep_quit beep_2: -0000fd 930f -0000fe e407 -0000ff bf06 -000100 910f -000101 9ad9 -000102 9aba -000103 d06b -000104 98d9 -000105 98ba beep_led_2 -000106 d01d rcall OCR0A_reset -000107 c015 rjmp beep_quit +0000fb 930f +0000fc e407 +0000fd bf06 +0000fe 910f +0000ff 9ad9 +000100 9aba +000101 d06b +000102 98d9 +000103 98ba beep_led_2 +000104 d01d rcall OCR0A_reset +000105 c015 rjmp beep_quit beep_3: -000108 930f -000109 e609 -00010a bf06 -00010b 910f -00010c 9ada -00010d 9aba -00010e d060 -00010f 98da -000110 98ba beep_led_3 -000111 d012 rcall OCR0A_reset -000112 c00a rjmp beep_quit +000106 930f +000107 e609 +000108 bf06 +000109 910f +00010a 9ada +00010b 9aba +00010c d060 +00010d 98da +00010e 98ba beep_led_3 +00010f d012 rcall OCR0A_reset +000110 c00a rjmp beep_quit beep_4: -000113 930f -000114 e500 -000115 bf06 -000116 910f -000117 9adb -000118 9aba -000119 d055 -00011a 98db -00011b 98ba beep_led_4 -00011c d007 rcall OCR0A_reset +000111 930f +000112 e500 +000113 bf06 +000114 910f +000115 9adb +000116 9aba +000117 d055 +000118 98db +000119 98ba beep_led_4 +00011a d007 rcall OCR0A_reset beep_quit: -00011d d051 rcall delay -00011e 957a dec temp_r_b -00011f 3070 cpi temp_r_b, 0 -000120 f631 brne _sequence_loop +00011b d051 rcall delay +00011c 957a dec temp_r_b +00011d 3070 cpi temp_r_b, 0 +00011e f631 brne _sequence_loop _seq_quit: -000121 d007 rcall dec_delay_counter -000122 d05a rcall delay_50ms -000123 9508 ret +00011f d007 rcall dec_delay_counter +000120 d05a rcall delay_50ms +000121 9508 ret OCR0A_reset: ; This function need to set the OCR0A register to 0xff for overflow interrupt -000124 937f push temp_r_b -000125 ef7f ldi temp_r_b, 0xff -000126 bf76 out OCR0A, temp_r_b -000127 917f pop temp_r_b -000128 9508 ret +000122 937f push temp_r_b +000123 ef7f ldi temp_r_b, 0xff +000124 bf76 out OCR0A, temp_r_b +000125 917f pop temp_r_b +000126 9508 ret dec_delay_counter: -000129 503a subi delay_counter_r, 10 -00012a 3238 cpi delay_counter_r, 40 -00012b f008 brlo _reset_counter -00012c 9508 ret +000127 503a subi delay_counter_r, 10 +000128 3238 cpi delay_counter_r, 40 +000129 f008 brlo _reset_counter +00012a 9508 ret _reset_counter: -00012d ef3f ldi delay_counter_r, 0xff -00012e 9508 ret +00012b ef3f ldi delay_counter_r, 0xff +00012c 9508 ret effect_1: ; Shift bits of an leds in port every 50ms -00012f 931f push r17 -000130 932f push r18 -000131 933f push r19 -000132 934f push r20 -000133 94f8 cli -000134 b34b in r20, LED_PORT +00012d 931f push r17 +00012e 932f push r18 +00012f 933f push r19 +000130 934f push r20 +000131 94f8 cli +000132 b34b in r20, LED_PORT -000135 930f -000136 ef01 -000137 bb0b -000138 910f outi LED_PORT, 0xf1 -000139 d043 rcall delay_50ms -00013a e011 ldi r17, 0x01 -00013b e033 ldi r19, 3 +000133 930f +000134 ef01 +000135 bb0b +000136 910f outi LED_PORT, 0xf1 +000137 d043 rcall delay_50ms +000138 e011 ldi r17, 0x01 +000139 e033 ldi r19, 3 _eff_1_shift_l: ; Shift bits to left loop -00013c ef20 ldi r18, 0xf0 -00013d 0f11 lsl r17 -00013e 0f21 add r18, r17 -00013f bb2b out LED_PORT, r18 -000140 d03c rcall delay_50ms -000141 953a dec r19 -000142 f7c9 brne _eff_1_shift_l +00013a ef20 ldi r18, 0xf0 +00013b 0f11 lsl r17 +00013c 0f21 add r18, r17 +00013d bb2b out LED_PORT, r18 +00013e d03c rcall delay_50ms +00013f 953a dec r19 +000140 f7c9 brne _eff_1_shift_l -000143 930f -000144 ef08 -000145 bb0b -000146 910f outi LED_PORT, 0xf8 -000147 d035 rcall delay_50ms -000148 e018 ldi r17, 0x08 -000149 e033 ldi r19, 3 +000141 930f +000142 ef08 +000143 bb0b +000144 910f outi LED_PORT, 0xf8 +000145 d035 rcall delay_50ms +000146 e018 ldi r17, 0x08 +000147 e033 ldi r19, 3 _eff_1_shift_r: ; Shift bits to right loop -00014a ef20 ldi r18, 0xf0 -00014b 9516 lsr r17 -00014c 0f21 add r18, r17 -00014d bb2b out LED_PORT, r18 -00014e d02e rcall delay_50ms -00014f 953a dec r19 -000150 f7c9 brne _eff_1_shift_r +000148 ef20 ldi r18, 0xf0 +000149 9516 lsr r17 +00014a 0f21 add r18, r17 +00014b bb2b out LED_PORT, r18 +00014c d02e rcall delay_50ms +00014d 953a dec r19 +00014e f7c9 brne _eff_1_shift_r -000151 9478 sei +00014f 9478 sei ; Out saved PORT values -000152 bb4b out LED_PORT, r20 -000153 914f pop r20 -000154 913f pop r19 -000155 912f pop r18 -000156 911f pop r17 -000157 9508 ret +000150 bb4b out LED_PORT, r20 +000151 914f pop r20 +000152 913f pop r19 +000153 912f pop r18 +000154 911f pop r17 +000155 9508 ret init_interrupts: ; ; Enable Port Change Interrupt -000158 e100 ldi temp_r, (1<