mirror of
https://github.com/sergeyyarkov/attiny24a_memory-led-game.git
synced 2026-10-11 02:08:54 +03:00
feat: answer checking
This commit is contained in:
parent
3329131aa2
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110
firmware.asm
110
firmware.asm
@ -20,6 +20,7 @@
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.def temp_r_c = r26 ; Temp general register C
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.def mcu_state_r = r17 ; Current state of MCU. This register will be compared in an main loop
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.def delay_counter_r = r19 ; Register for storing delay counter
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.def poll_step_r = r20 ; Current poll step for checking the input with answer
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;
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; LEDS constants
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@ -149,6 +150,9 @@ MCU_Init: ; This function executes once on start the main program
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rcall init_buzzer
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ldi delay_counter_r, 0xff
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ldi poll_step_r, 1
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clr ZH
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ldi ZL, $80
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;rcall MCU_Delay ; Wait 1 sec before start main program
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@ -186,60 +190,107 @@ loop: ; Program loop
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polling: ; Polling state
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cpi mcu_state_r, POLLING_STATE
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brne completion
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led_1:
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btn_1:
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lds r18, SW_FLAGS_ADDRESS
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cpi r18, SW_FLAG_1
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brne led_off_1
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brne btn_2 ; Check next button
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led_on_1:
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outi OCR0A, 142
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sbi LED_PORT, 0
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sbi BUZZ_DIR, BUZZ_PIN
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rjmp led_1
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led_off_1:
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rcall btn_handler
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cbi LED_PORT, 0
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cbi BUZZ_DIR, BUZZ_PIN
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led_2:
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cbi BUZZ_DIR, BUZZ_PIN
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rjmp btn_1
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btn_2:
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lds r18, SW_FLAGS_ADDRESS
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cpi r18, SW_FLAG_2
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brne led_off_2
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brne btn_3
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led_on_2:
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outi OCR0A, 71
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sbi LED_PORT, 1
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sbi BUZZ_DIR, BUZZ_PIN
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outi OCR0A, 71
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rjmp led_2
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led_off_2:
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rcall btn_handler
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cbi LED_PORT, 1
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cbi BUZZ_DIR, BUZZ_PIN
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led_3:
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cbi BUZZ_DIR, BUZZ_PIN
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rjmp btn_2
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btn_3:
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lds r18, SW_FLAGS_ADDRESS
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cpi r18, SW_FLAG_3
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brne led_off_3
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brne btn_4
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led_on_3:
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outi OCR0A, 105
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sbi LED_PORT, 2
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sbi BUZZ_DIR, BUZZ_PIN
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outi OCR0A, 105
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rjmp led_3
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led_off_3:
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rcall btn_handler
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cbi LED_PORT, 2
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cbi BUZZ_DIR, BUZZ_PIN
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led_4:
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cbi BUZZ_DIR, BUZZ_PIN
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rjmp btn_3
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btn_4:
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lds r18, SW_FLAGS_ADDRESS
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cpi r18, SW_FLAG_4
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brne led_off_4
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brne default
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led_on_4:
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outi OCR0A, 80
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sbi LED_PORT, 3
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sbi BUZZ_DIR, BUZZ_PIN
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outi OCR0A, 80
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rjmp led_4
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led_off_4:
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rcall btn_handler
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cbi LED_PORT, 3
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cbi BUZZ_DIR, BUZZ_PIN
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cbi BUZZ_DIR, BUZZ_PIN
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rjmp btn_4
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completion: ; Reset delay counter, set MCU state to SHOWING
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cpi mcu_state_r, COMPLETION_STATE
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brne default
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default: ; Do nothing
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default:
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rcall OCR0A_reset
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rjmp loop
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btn_handler: ; Check the input value with answer in SRAM
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push r18
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rcall delay_50ms
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rcall delay_50ms
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rcall delay_50ms
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rcall delay_50ms
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in temp_r_c, PINA
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mov r25, temp_r_c
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andi temp_r_c, 0xf0
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andi r25, 0x0f
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clr temp_r_c
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sts SW_FLAGS_ADDRESS, temp_r_c
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ld r24, Z+
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cp r25, r24 ; Check answer
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brne _game_over ; Game over
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ldi r18, SEQ_LENGTH
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cp r18, poll_step_r
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breq _btn_handler_exit_state
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inc poll_step_r
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rjmp _btn_handler_exit
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_game_over:
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rcall effect_1
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ldi delay_counter_r, 0xff
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_btn_handler_exit_state:
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pop r18
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clr ZH
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ldi ZL, $80
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cbi BUZZ_DIR, BUZZ_PIN
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ldi temp_r, 0xf0
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out LED_PORT, temp_r
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rcall delay_1s
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set_state SHOWING_STATE
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ldi poll_step_r, 1
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ret
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_btn_handler_exit:
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pop r18
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ret
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ret
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gen_ran_seq: ; Generate random sequence of bytes for leds and save answer to SRAM
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ldi temp_r_b, SEQ_LENGTH
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clr YH
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@ -327,8 +378,7 @@ show_sequence:
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_seq_quit:
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rcall dec_delay_counter
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rcall delay_1s
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rjmp show_sequence
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rcall delay_50ms
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ret
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OCR0A_reset: ; This function need to set the OCR0A register to 0xff for overflow interrupt
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@ -348,6 +398,10 @@ dec_delay_counter:
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ret
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effect_1: ; Shift bits of an leds in port every 50ms
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push r17
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push r18
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push r19
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push r20
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in r20, LED_PORT
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outi LED_PORT, 0xf1
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@ -379,6 +433,10 @@ effect_1: ; Shift bits of an leds in port every 50ms
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;
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; Out saved PORT values
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out LED_PORT, r20
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pop r20
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pop r19
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pop r18
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pop r17
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ret
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init_interrupts:
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93
firmware.hex
93
firmware.hex
@ -1,48 +1,55 @@
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:020000020000FC
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:1000000038C018950EC0189518951895189518951C
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:100000003BC018950EC01895189518951895189519
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:1000100018951895189515C0189518951895189550
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:1000200018951F932F932FB710916000133031F460
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:1000300019B3107F22D1109362002FBF2F911F910F
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:1000300019B3107F5AD1109362002FBF2F911F91D7
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:1000400018957F937FB702C008EA52B7052702953B
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:10005000500F7FBF7F911895FBD0EAD0EFD03FEFD4
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:100060007894089506E0C5D00A95E9F712D10027E3
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:1000700008950FED0DBF0027109361000F9301E06D
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:10008000009360000F9110916000113041F4E4DFA3
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:10009000109361000F9302E0009360000F91123003
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:1000A00041F45AD0109361000F9303E00093600075
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:1000B0000F911330A1F520916200203E39F40F9387
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:1000C0000EE806BF0F91D89ABA9AF5CFD898BA9889
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:1000D00020916200203D39F4D99ABA9A0F9307E42F
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:1000E00006BF0F91F5CFD998BA9820916200203BB6
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:1000F00039F4DA9ABA9A0F9309E606BF0F91F5CF51
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:10010000DA98BA9820916200203739F4DB9ABA9ACB
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:100110000F9300E506BF0F91F5CFDB98BA98143026
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:1001200001F4B1CF74E0DD27C0E8A7D0652F6634B5
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:1001300030F06C3830F0683C30F06F3F30F0A1E0C8
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:1001400005C0A2E003C0A4E001C0A8E0A9937A958D
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:10015000703059F700000895E5DF74E0DD27C0E84E
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:100160007030C1F1A991A13031F0A23079F0A43002
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:10017000C1F0A83009F10F930EE806BF0F91D89A8D
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:10018000BA9A6DD0D898BA9829D020C00F9307E4B6
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:1001900006BF0F91D99ABA9A62D0D998BA981ED050
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:1001A00015C00F9309E606BF0F91DA9ABA9A57D095
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:1001B000DA98BA9813D00AC00F9300E506BF0F91E2
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:1001C000DB9ABA9A4CD0DB98BA9808D048D07A9586
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:1001D000703031F608D05DD0BFCF08957F937FEFA8
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:1001E00076BF7F9108953A50383208F008953FEF76
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:1001F00008954BB30F9301EF0BBB0F913ED011E06D
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:1002000033E020EF110F210F2BBB37D03A95C9F700
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:100210000F9308EF0BBB0F9130D018E033E020EFC5
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:100220001695210F2BBB29D03A95C9F74BBB0895E2
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:1002300000E10BBF00EF02BB00270895BA9802E46B
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:1002400000BF0FEF06BF02E003BF01E009BF089542
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:100250000FE00ABB02950BBBBA9AC29808952F9380
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:100260004F932FEF432F00002A95E9F700004A959E
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:10027000D1F700004F912F9108952F933F9321E4E0
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:100280003FEE3A95F1F72A95E1F700003F912F9163
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:10029000089524E683EC99E00197F1F72A95D1F7C8
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:1002A00024E608954D656D6F7279206C6564206752
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:1002B000616D652E205772697474656E20627920B5
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:1002C000536572676579205961726B6F762032379A
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:0802D0002E30392E323032319C
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:10005000500F7FBF7F91189533D122D127D13FEF29
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:1000600041E0FF27E0E87894089506E0F2D00A9591
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:10007000E9F747D1002708950FED0DBF0027109332
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:1000800061000F9301E0009360000F9110916000F8
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:10009000113041F4E1DF109361000F9302E000930F
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:1000A00060000F91123041F488D0109361000F93DB
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:1000B00003E0009360000F911330C1F520916200BE
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:1000C000203E51F40F930EE806BF0F91D89ABA9ACA
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:1000D00031D0D898BA98F2CF20916200203D51F4E7
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:1000E0000F9307E406BF0F91D99ABA9A23D0D998F3
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:1000F000BA98F2CF20916200203B51F40F9309E6A9
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:1001000006BF0F91DA9ABA9A15D0DA98BA98F2CF58
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:1001100020916200203761F40F9300E506BF0F9134
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:10012000DB9ABA9A07D0DB98BA98F2CF143001F470
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:1001300085D0ACCF2F93D9D0D8D0D7D0D6D0A9B333
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:100140009A2FA07F9F70AA27A09362008191981791
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:1001500029F424E0241721F0439512C07AD03FEF10
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:100160002F91FF27E0E8BA9800EF0BBBCAD010939D
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:1001700061000F9302E0009360000F9141E0089549
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:100180002F910895089574E0DD27C0E8AED0652F63
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:10019000663430F06C3830F0683C30F06F3F30F04F
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:1001A000A1E005C0A2E003C0A4E001C0A8E0A993BB
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:1001B0007A95703059F700000895E5DF74E0DD2787
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:1001C000C0E87030C1F1A991A13031F0A23079F0CE
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:1001D000A430C1F0A83009F10F930EE806BF0F91CB
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:1001E000D89ABA9A74D0D898BA9828D020C00F93C9
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:1001F00007E406BF0F91D99ABA9A69D0D998BA98EC
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:100200001DD015C00F9309E606BF0F91DA9ABA9A6E
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:100210005ED0DA98BA9812D00AC00F9300E506BFF4
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:100220000F91DB9ABA9A53D0DB98BA9807D04FD087
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:100230007A95703031F607D058D008957F937FEFCC
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:1002400076BF7F9108953A50383208F008953FEF15
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:1002500008951F932F933F934F934BB30F9301EF49
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:100260000BBB0F9142D011E033E020EF110F210FB3
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:100270002BBB3BD03A95C9F70F9308EF0BBB0F91FF
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:1002800034D018E033E020EF1695210F2BBB2DD092
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:100290003A95C9F74BBB4F913F912F911F9108950C
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:1002A00000E10BBF00EF02BB00270895BA9802E4FB
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:1002B00000BF0FEF06BF02E003BF01E009BF0895D2
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:1002C0000FE00ABB02950BBBBA9AC29808952F9310
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:1002D0004F932FEF432F00002A95E9F700004A952E
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:1002E000D1F700004F912F9108952F933F9321E470
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:1002F0003FEE3A95F1F72A95E1F700003F912F91F3
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:10030000089524E683EC99E00197F1F72A95D1F757
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:1003100024E608954D656D6F7279206C65642067E1
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:10032000616D652E205772697474656E2062792044
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:10033000536572676579205961726B6F7620323729
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:080340002E30392E323032312B
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:00000001FF
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742
firmware.lss
742
firmware.lss
@ -1,11 +1,11 @@
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AVRASM ver. 2.2.7 firmware.asm Tue May 03 01:06:34 2022
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AVRASM ver. 2.2.7 firmware.asm Tue May 03 17:14:17 2022
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firmware.asm(13): Including file 'def.inc'
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firmware.asm(20): warning: Register r26 already defined by the .DEF directive
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firmware.asm(72): Including file 'macros.asm'
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firmware.asm(73): Including file 'macros.asm'
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firmware.asm(13): Including file 'def.inc'
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firmware.asm(72): Including file 'macros.asm'
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firmware.asm(73): Including file 'macros.asm'
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; Project name: memory-led-game
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@ -704,6 +704,7 @@ firmware.asm(72): Including file 'macros.asm'
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.def temp_r_c = r26 ; Temp general register C
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.def mcu_state_r = r17 ; Current state of MCU. This register will be compared in an main loop
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.def delay_counter_r = r19 ; Register for storing delay counter
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.def poll_step_r = r20 ; Current poll step for checking the input with answer
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;
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; LEDS constants
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@ -862,7 +863,7 @@ firmware.asm(72): Including file 'macros.asm'
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;
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; Setup vectors
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000000 c038 rjmp start ; Program start at RESET vector
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000000 c03b rjmp start ; Program start at RESET vector
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000001 9518 reti ; External Interrupt Request 0 / inactive
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000002 c00e rjmp PCINT0_vect ; Pin Change Interrupt Request 0 / active
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000003 9518 reti ; Pin Change Interrupt Request 1 / inactive
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@ -891,7 +892,7 @@ firmware.asm(72): Including file 'macros.asm'
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000017 f431 brne quit ; Do not change button flags unless in POLLING state of mcu
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000018 b319 in r17, PINA ; Load current pins status of PINA
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000019 7f10 andi r17, 0xf0 ; Get pins status of only buttons
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00001a d122 rcall delay_50ms ; Delay for button
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00001a d15a rcall delay_50ms ; Delay for button
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00001b 9310 0062 sts SW_FLAGS_ADDRESS, r17 ; Update flag status in SRAM
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00001d bf2f out SREG, r18
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@ -918,424 +919,485 @@ firmware.asm(72): Including file 'macros.asm'
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00002b 9518 reti
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MCU_Init: ; This function executes once on start the main program
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00002c d0fb rcall init_ports
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00002d d0ea rcall init_interrupts
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00002e d0ef rcall init_buzzer
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00002c d133 rcall init_ports
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00002d d122 rcall init_interrupts
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00002e d127 rcall init_buzzer
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00002f ef3f ldi delay_counter_r, 0xff
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000030 e041 ldi poll_step_r, 1
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000031 27ff clr ZH
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000032 e8e0 ldi ZL, $80
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;rcall MCU_Delay ; Wait 1 sec before start main program
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000030 9478 sei ; Enable Global Interrupts
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000031 9508 ret
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000033 9478 sei ; Enable Global Interrupts
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000034 9508 ret
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MCU_Delay:
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000032 e006 ldi temp_r, 6
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000035 e006 ldi temp_r, 6
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_init_loop_loading:
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000033 d0c5 rcall effect_1
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000034 950a dec temp_r
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000035 f7e9 brne _init_loop_loading
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000036 d112 rcall delay_1s
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000037 2700 clr temp_r
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000038 9508 ret
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000036 d0f2 rcall effect_1
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000037 950a dec temp_r
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000038 f7e9 brne _init_loop_loading
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000039 d147 rcall delay_1s
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00003a 2700 clr temp_r
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00003b 9508 ret
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;
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; Program start at reset
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start:
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000039 ed0f
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00003a bf0d
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00003b 2700 init_stack_p temp_r, RAMEND
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00003c ed0f
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00003d bf0d
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00003e 2700 init_stack_p temp_r, RAMEND
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00003c 9310 0061
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00003e 930f
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00003f e001
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000040 9300 0060
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000042 910f set_state INIT_STATE
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00003f 9310 0061
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000041 930f
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000042 e001
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000043 9300 0060
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000045 910f set_state INIT_STATE
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loop: ; Program loop
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000043 9110 0060 lds mcu_state_r, CURRENT_STATE_ADDRESS
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000046 9110 0060 lds mcu_state_r, CURRENT_STATE_ADDRESS
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init: ; Init state
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000045 3011 cpi mcu_state_r, INIT_STATE
|
||||
000046 f441 brne showing
|
||||
000047 dfe4 rcall MCU_Init
|
||||
000048 9310 0061
|
||||
00004a 930f
|
||||
00004b e002
|
||||
00004c 9300 0060
|
||||
00004e 910f set_state SHOWING_STATE
|
||||
000048 3011 cpi mcu_state_r, INIT_STATE
|
||||
000049 f441 brne showing
|
||||
00004a dfe1 rcall MCU_Init
|
||||
00004b 9310 0061
|
||||
00004d 930f
|
||||
00004e e002
|
||||
00004f 9300 0060
|
||||
000051 910f set_state SHOWING_STATE
|
||||
showing: ; Showing state
|
||||
00004f 3012 cpi mcu_state_r, SHOWING_STATE
|
||||
000050 f441 brne polling
|
||||
000051 d05a rcall show_sequence ; Generate sequence and save answer to SRAM
|
||||
000052 9310 0061
|
||||
000054 930f
|
||||
000055 e003
|
||||
000056 9300 0060
|
||||
000058 910f set_state POLLING_STATE
|
||||
000052 3012 cpi mcu_state_r, SHOWING_STATE
|
||||
000053 f441 brne polling
|
||||
000054 d088 rcall show_sequence ; Generate sequence and save answer to SRAM
|
||||
000055 9310 0061
|
||||
000057 930f
|
||||
000058 e003
|
||||
000059 9300 0060
|
||||
00005b 910f set_state POLLING_STATE
|
||||
polling: ; Polling state
|
||||
000059 3013 cpi mcu_state_r, POLLING_STATE
|
||||
00005a f5a1 brne completion
|
||||
led_1:
|
||||
00005b 9120 0062 lds r18, SW_FLAGS_ADDRESS
|
||||
00005d 3e20 cpi r18, SW_FLAG_1
|
||||
00005e f439 brne led_off_1
|
||||
00005c 3013 cpi mcu_state_r, POLLING_STATE
|
||||
00005d f5c1 brne completion
|
||||
btn_1:
|
||||
00005e 9120 0062 lds r18, SW_FLAGS_ADDRESS
|
||||
000060 3e20 cpi r18, SW_FLAG_1
|
||||
000061 f451 brne btn_2 ; Check next button
|
||||
led_on_1:
|
||||
00005f 930f
|
||||
000060 e80e
|
||||
000061 bf06
|
||||
000062 910f outi OCR0A, 142
|
||||
000063 9ad8 sbi LED_PORT, 0
|
||||
000064 9aba sbi BUZZ_DIR, BUZZ_PIN
|
||||
000065 cff5 rjmp led_1
|
||||
led_off_1:
|
||||
000066 98d8 cbi LED_PORT, 0
|
||||
000067 98ba cbi BUZZ_DIR, BUZZ_PIN
|
||||
led_2:
|
||||
000068 9120 0062 lds r18, SW_FLAGS_ADDRESS
|
||||
00006a 3d20 cpi r18, SW_FLAG_2
|
||||
00006b f439 brne led_off_2
|
||||
000062 930f
|
||||
000063 e80e
|
||||
000064 bf06
|
||||
000065 910f outi OCR0A, 142
|
||||
000066 9ad8 sbi LED_PORT, 0
|
||||
000067 9aba sbi BUZZ_DIR, BUZZ_PIN
|
||||
000068 d031 rcall btn_handler
|
||||
000069 98d8 cbi LED_PORT, 0
|
||||
00006a 98ba cbi BUZZ_DIR, BUZZ_PIN
|
||||
00006b cff2 rjmp btn_1
|
||||
btn_2:
|
||||
00006c 9120 0062 lds r18, SW_FLAGS_ADDRESS
|
||||
00006e 3d20 cpi r18, SW_FLAG_2
|
||||
00006f f451 brne btn_3
|
||||
led_on_2:
|
||||
00006c 9ad9 sbi LED_PORT, 1
|
||||
00006d 9aba sbi BUZZ_DIR, BUZZ_PIN
|
||||
00006e 930f
|
||||
00006f e407
|
||||
000070 bf06
|
||||
000071 910f outi OCR0A, 71
|
||||
000072 cff5 rjmp led_2
|
||||
led_off_2:
|
||||
000073 98d9 cbi LED_PORT, 1
|
||||
000074 98ba cbi BUZZ_DIR, BUZZ_PIN
|
||||
led_3:
|
||||
000075 9120 0062 lds r18, SW_FLAGS_ADDRESS
|
||||
000077 3b20 cpi r18, SW_FLAG_3
|
||||
000078 f439 brne led_off_3
|
||||
000070 930f
|
||||
000071 e407
|
||||
000072 bf06
|
||||
000073 910f outi OCR0A, 71
|
||||
000074 9ad9 sbi LED_PORT, 1
|
||||
000075 9aba sbi BUZZ_DIR, BUZZ_PIN
|
||||
000076 d023 rcall btn_handler
|
||||
000077 98d9 cbi LED_PORT, 1
|
||||
000078 98ba cbi BUZZ_DIR, BUZZ_PIN
|
||||
000079 cff2 rjmp btn_2
|
||||
btn_3:
|
||||
00007a 9120 0062 lds r18, SW_FLAGS_ADDRESS
|
||||
00007c 3b20 cpi r18, SW_FLAG_3
|
||||
00007d f451 brne btn_4
|
||||
led_on_3:
|
||||
000079 9ada sbi LED_PORT, 2
|
||||
00007a 9aba sbi BUZZ_DIR, BUZZ_PIN
|
||||
00007b 930f
|
||||
00007c e609
|
||||
00007d bf06
|
||||
00007e 910f outi OCR0A, 105
|
||||
00007f cff5 rjmp led_3
|
||||
led_off_3:
|
||||
000080 98da cbi LED_PORT, 2
|
||||
000081 98ba cbi BUZZ_DIR, BUZZ_PIN
|
||||
led_4:
|
||||
000082 9120 0062 lds r18, SW_FLAGS_ADDRESS
|
||||
000084 3720 cpi r18, SW_FLAG_4
|
||||
000085 f439 brne led_off_4
|
||||
00007e 930f
|
||||
00007f e609
|
||||
000080 bf06
|
||||
000081 910f outi OCR0A, 105
|
||||
000082 9ada sbi LED_PORT, 2
|
||||
000083 9aba sbi BUZZ_DIR, BUZZ_PIN
|
||||
000084 d015 rcall btn_handler
|
||||
000085 98da cbi LED_PORT, 2
|
||||
000086 98ba cbi BUZZ_DIR, BUZZ_PIN
|
||||
000087 cff2 rjmp btn_3
|
||||
btn_4:
|
||||
000088 9120 0062 lds r18, SW_FLAGS_ADDRESS
|
||||
00008a 3720 cpi r18, SW_FLAG_4
|
||||
00008b f461 brne default
|
||||
led_on_4:
|
||||
000086 9adb sbi LED_PORT, 3
|
||||
000087 9aba sbi BUZZ_DIR, BUZZ_PIN
|
||||
000088 930f
|
||||
000089 e500
|
||||
00008a bf06
|
||||
00008b 910f outi OCR0A, 80
|
||||
00008c cff5 rjmp led_4
|
||||
led_off_4:
|
||||
00008d 98db cbi LED_PORT, 3
|
||||
00008e 98ba cbi BUZZ_DIR, BUZZ_PIN
|
||||
00008c 930f
|
||||
00008d e500
|
||||
00008e bf06
|
||||
00008f 910f outi OCR0A, 80
|
||||
000090 9adb sbi LED_PORT, 3
|
||||
000091 9aba sbi BUZZ_DIR, BUZZ_PIN
|
||||
000092 d007 rcall btn_handler
|
||||
000093 98db cbi LED_PORT, 3
|
||||
000094 98ba cbi BUZZ_DIR, BUZZ_PIN
|
||||
000095 cff2 rjmp btn_4
|
||||
completion: ; Reset delay counter, set MCU state to SHOWING
|
||||
00008f 3014 cpi mcu_state_r, COMPLETION_STATE
|
||||
000090 f401 brne default
|
||||
default: ; Do nothing
|
||||
000091 cfb1 rjmp loop
|
||||
000096 3014 cpi mcu_state_r, COMPLETION_STATE
|
||||
000097 f401 brne default
|
||||
default:
|
||||
000098 d085 rcall OCR0A_reset
|
||||
000099 cfac rjmp loop
|
||||
|
||||
|
||||
btn_handler: ; Check the input value with answer in SRAM
|
||||
00009a 932f push r18
|
||||
00009b d0d9 rcall delay_50ms
|
||||
00009c d0d8 rcall delay_50ms
|
||||
00009d d0d7 rcall delay_50ms
|
||||
00009e d0d6 rcall delay_50ms
|
||||
00009f b3a9 in temp_r_c, PINA
|
||||
0000a0 2f9a mov r25, temp_r_c
|
||||
0000a1 7fa0 andi temp_r_c, 0xf0
|
||||
0000a2 709f andi r25, 0x0f
|
||||
0000a3 27aa clr temp_r_c
|
||||
0000a4 93a0 0062 sts SW_FLAGS_ADDRESS, temp_r_c
|
||||
|
||||
0000a6 9181 ld r24, Z+
|
||||
0000a7 1798 cp r25, r24 ; Check answer
|
||||
0000a8 f429 brne _game_over ; Game over
|
||||
|
||||
0000a9 e024 ldi r18, SEQ_LENGTH
|
||||
0000aa 1724 cp r18, poll_step_r
|
||||
0000ab f021 breq _btn_handler_exit_state
|
||||
|
||||
0000ac 9543 inc poll_step_r
|
||||
|
||||
0000ad c012 rjmp _btn_handler_exit
|
||||
|
||||
_game_over:
|
||||
0000ae d07a rcall effect_1
|
||||
0000af ef3f ldi delay_counter_r, 0xff
|
||||
|
||||
_btn_handler_exit_state:
|
||||
0000b0 912f pop r18
|
||||
0000b1 27ff clr ZH
|
||||
0000b2 e8e0 ldi ZL, $80
|
||||
0000b3 98ba cbi BUZZ_DIR, BUZZ_PIN
|
||||
0000b4 ef00 ldi temp_r, 0xf0
|
||||
0000b5 bb0b out LED_PORT, temp_r
|
||||
0000b6 d0ca rcall delay_1s
|
||||
0000b7 9310 0061
|
||||
0000b9 930f
|
||||
0000ba e002
|
||||
0000bb 9300 0060
|
||||
0000bd 910f set_state SHOWING_STATE
|
||||
0000be e041 ldi poll_step_r, 1
|
||||
0000bf 9508 ret
|
||||
_btn_handler_exit:
|
||||
0000c0 912f pop r18
|
||||
0000c1 9508 ret
|
||||
0000c2 9508 ret
|
||||
|
||||
gen_ran_seq: ; Generate random sequence of bytes for leds and save answer to SRAM
|
||||
000092 e074 ldi temp_r_b, SEQ_LENGTH
|
||||
000093 27dd clr YH
|
||||
000094 e8c0 ldi YL, $80
|
||||
0000c3 e074 ldi temp_r_b, SEQ_LENGTH
|
||||
0000c4 27dd clr YH
|
||||
0000c5 e8c0 ldi YL, $80
|
||||
_gen_ran_loop:
|
||||
000095 d0a7 rcall delay_50ms ; Delay is required!
|
||||
000096 2f65 mov r22, r21
|
||||
0000c6 d0ae rcall delay_50ms ; Delay is required!
|
||||
0000c7 2f65 mov r22, r21
|
||||
|
||||
000097 3466 cpi r22, 70
|
||||
000098 f030 brlo _gen_answ_1
|
||||
0000c8 3466 cpi r22, 70
|
||||
0000c9 f030 brlo _gen_answ_1
|
||||
|
||||
000099 386c cpi r22, 140
|
||||
00009a f030 brlo _gen_answ_2
|
||||
0000ca 386c cpi r22, 140
|
||||
0000cb f030 brlo _gen_answ_2
|
||||
|
||||
00009b 3c68 cpi r22, 200
|
||||
00009c f030 brlo _gen_answ_3
|
||||
0000cc 3c68 cpi r22, 200
|
||||
0000cd f030 brlo _gen_answ_3
|
||||
|
||||
00009d 3f6f cpi r22, 255
|
||||
00009e f030 brlo _gen_answ_4
|
||||
0000ce 3f6f cpi r22, 255
|
||||
0000cf f030 brlo _gen_answ_4
|
||||
|
||||
_gen_answ_1:
|
||||
00009f e0a1 ldi temp_r_c, 0x01
|
||||
0000a0 c005 rjmp _gen_ran_write
|
||||
0000d0 e0a1 ldi temp_r_c, 0x01
|
||||
0000d1 c005 rjmp _gen_ran_write
|
||||
_gen_answ_2:
|
||||
0000a1 e0a2 ldi temp_r_c, 0x02
|
||||
0000a2 c003 rjmp _gen_ran_write
|
||||
0000d2 e0a2 ldi temp_r_c, 0x02
|
||||
0000d3 c003 rjmp _gen_ran_write
|
||||
_gen_answ_3:
|
||||
0000a3 e0a4 ldi temp_r_c, 0x04
|
||||
0000a4 c001 rjmp _gen_ran_write
|
||||
0000d4 e0a4 ldi temp_r_c, 0x04
|
||||
0000d5 c001 rjmp _gen_ran_write
|
||||
_gen_answ_4:
|
||||
0000a5 e0a8 ldi temp_r_c, 0x08
|
||||
0000d6 e0a8 ldi temp_r_c, 0x08
|
||||
_gen_ran_write:
|
||||
0000a6 93a9 st Y+, temp_r_c
|
||||
0000a7 957a dec temp_r_b
|
||||
0000a8 3070 cpi temp_r_b, 0
|
||||
0000a9 f759 brne _gen_ran_loop
|
||||
0000aa 0000 nop
|
||||
0000ab 9508 ret
|
||||
0000d7 93a9 st Y+, temp_r_c
|
||||
0000d8 957a dec temp_r_b
|
||||
0000d9 3070 cpi temp_r_b, 0
|
||||
0000da f759 brne _gen_ran_loop
|
||||
0000db 0000 nop
|
||||
0000dc 9508 ret
|
||||
|
||||
show_sequence:
|
||||
0000ac dfe5 rcall gen_ran_seq ; Answer stored in SRAM in addr $80:{SEQ_LENGTH}
|
||||
0000dd dfe5 rcall gen_ran_seq ; Answer stored in SRAM in addr $80:{SEQ_LENGTH}
|
||||
show_start:
|
||||
0000ad e074 ldi temp_r_b, SEQ_LENGTH
|
||||
0000de e074 ldi temp_r_b, SEQ_LENGTH
|
||||
|
||||
0000ae 27dd clr YH
|
||||
0000af e8c0 ldi YL, $80
|
||||
0000df 27dd clr YH
|
||||
0000e0 e8c0 ldi YL, $80
|
||||
|
||||
_sequence_loop:
|
||||
0000b0 3070 cpi temp_r_b, 0
|
||||
0000b1 f1c1 breq _seq_quit
|
||||
0000e1 3070 cpi temp_r_b, 0
|
||||
0000e2 f1c1 breq _seq_quit
|
||||
|
||||
0000b2 91a9 ld temp_r_c, Y+
|
||||
0000b3 30a1 cpi temp_r_c, 0x01
|
||||
0000b4 f031 breq beep_1
|
||||
0000e3 91a9 ld temp_r_c, Y+
|
||||
0000e4 30a1 cpi temp_r_c, 0x01
|
||||
0000e5 f031 breq beep_1
|
||||
|
||||
0000b5 30a2 cpi temp_r_c, 0x02
|
||||
0000b6 f079 breq beep_2
|
||||
0000e6 30a2 cpi temp_r_c, 0x02
|
||||
0000e7 f079 breq beep_2
|
||||
|
||||
0000b7 30a4 cpi temp_r_c, 0x04
|
||||
0000b8 f0c1 breq beep_3
|
||||
0000e8 30a4 cpi temp_r_c, 0x04
|
||||
0000e9 f0c1 breq beep_3
|
||||
|
||||
0000b9 30a8 cpi temp_r_c, 0x08
|
||||
0000ba f109 breq beep_4
|
||||
0000ea 30a8 cpi temp_r_c, 0x08
|
||||
0000eb f109 breq beep_4
|
||||
|
||||
beep_1:
|
||||
0000bb 930f
|
||||
0000bc e80e
|
||||
0000bd bf06
|
||||
0000be 910f
|
||||
0000bf 9ad8
|
||||
0000c0 9aba
|
||||
0000c1 d06d
|
||||
0000c2 98d8
|
||||
0000c3 98ba beep_led_1
|
||||
0000c4 d029 rcall OCR0A_reset
|
||||
0000c5 c020 rjmp beep_quit
|
||||
0000ec 930f
|
||||
0000ed e80e
|
||||
0000ee bf06
|
||||
0000ef 910f
|
||||
0000f0 9ad8
|
||||
0000f1 9aba
|
||||
0000f2 d074
|
||||
0000f3 98d8
|
||||
0000f4 98ba beep_led_1
|
||||
0000f5 d028 rcall OCR0A_reset
|
||||
0000f6 c020 rjmp beep_quit
|
||||
beep_2:
|
||||
0000c6 930f
|
||||
0000c7 e407
|
||||
0000c8 bf06
|
||||
0000c9 910f
|
||||
0000ca 9ad9
|
||||
0000cb 9aba
|
||||
0000cc d062
|
||||
0000cd 98d9
|
||||
0000ce 98ba beep_led_2
|
||||
0000cf d01e rcall OCR0A_reset
|
||||
0000d0 c015 rjmp beep_quit
|
||||
0000f7 930f
|
||||
0000f8 e407
|
||||
0000f9 bf06
|
||||
0000fa 910f
|
||||
0000fb 9ad9
|
||||
0000fc 9aba
|
||||
0000fd d069
|
||||
0000fe 98d9
|
||||
0000ff 98ba beep_led_2
|
||||
000100 d01d rcall OCR0A_reset
|
||||
000101 c015 rjmp beep_quit
|
||||
beep_3:
|
||||
0000d1 930f
|
||||
0000d2 e609
|
||||
0000d3 bf06
|
||||
0000d4 910f
|
||||
0000d5 9ada
|
||||
0000d6 9aba
|
||||
0000d7 d057
|
||||
0000d8 98da
|
||||
0000d9 98ba beep_led_3
|
||||
0000da d013 rcall OCR0A_reset
|
||||
0000db c00a rjmp beep_quit
|
||||
000102 930f
|
||||
000103 e609
|
||||
000104 bf06
|
||||
000105 910f
|
||||
000106 9ada
|
||||
000107 9aba
|
||||
000108 d05e
|
||||
000109 98da
|
||||
00010a 98ba beep_led_3
|
||||
00010b d012 rcall OCR0A_reset
|
||||
00010c c00a rjmp beep_quit
|
||||
beep_4:
|
||||
0000dc 930f
|
||||
0000dd e500
|
||||
0000de bf06
|
||||
0000df 910f
|
||||
0000e0 9adb
|
||||
0000e1 9aba
|
||||
0000e2 d04c
|
||||
0000e3 98db
|
||||
0000e4 98ba beep_led_4
|
||||
0000e5 d008 rcall OCR0A_reset
|
||||
00010d 930f
|
||||
00010e e500
|
||||
00010f bf06
|
||||
000110 910f
|
||||
000111 9adb
|
||||
000112 9aba
|
||||
000113 d053
|
||||
000114 98db
|
||||
000115 98ba beep_led_4
|
||||
000116 d007 rcall OCR0A_reset
|
||||
beep_quit:
|
||||
0000e6 d048 rcall delay
|
||||
0000e7 957a dec temp_r_b
|
||||
0000e8 3070 cpi temp_r_b, 0
|
||||
0000e9 f631 brne _sequence_loop
|
||||
000117 d04f rcall delay
|
||||
000118 957a dec temp_r_b
|
||||
000119 3070 cpi temp_r_b, 0
|
||||
00011a f631 brne _sequence_loop
|
||||
|
||||
_seq_quit:
|
||||
0000ea d008 rcall dec_delay_counter
|
||||
0000eb d05d rcall delay_1s
|
||||
0000ec cfbf rjmp show_sequence
|
||||
0000ed 9508 ret
|
||||
00011b d007 rcall dec_delay_counter
|
||||
00011c d058 rcall delay_50ms
|
||||
00011d 9508 ret
|
||||
|
||||
OCR0A_reset: ; This function need to set the OCR0A register to 0xff for overflow interrupt
|
||||
0000ee 937f push temp_r_b
|
||||
0000ef ef7f ldi temp_r_b, 0xff
|
||||
0000f0 bf76 out OCR0A, temp_r_b
|
||||
0000f1 917f pop temp_r_b
|
||||
0000f2 9508 ret
|
||||
00011e 937f push temp_r_b
|
||||
00011f ef7f ldi temp_r_b, 0xff
|
||||
000120 bf76 out OCR0A, temp_r_b
|
||||
000121 917f pop temp_r_b
|
||||
000122 9508 ret
|
||||
|
||||
dec_delay_counter:
|
||||
0000f3 503a subi delay_counter_r, 10
|
||||
0000f4 3238 cpi delay_counter_r, 40
|
||||
0000f5 f008 brlo _reset_counter
|
||||
0000f6 9508 ret
|
||||
000123 503a subi delay_counter_r, 10
|
||||
000124 3238 cpi delay_counter_r, 40
|
||||
000125 f008 brlo _reset_counter
|
||||
000126 9508 ret
|
||||
_reset_counter:
|
||||
0000f7 ef3f ldi delay_counter_r, 0xff
|
||||
0000f8 9508 ret
|
||||
000127 ef3f ldi delay_counter_r, 0xff
|
||||
000128 9508 ret
|
||||
|
||||
effect_1: ; Shift bits of an leds in port every 50ms
|
||||
0000f9 b34b in r20, LED_PORT
|
||||
000129 931f push r17
|
||||
00012a 932f push r18
|
||||
00012b 933f push r19
|
||||
00012c 934f push r20
|
||||
00012d b34b in r20, LED_PORT
|
||||
|
||||
0000fa 930f
|
||||
0000fb ef01
|
||||
0000fc bb0b
|
||||
0000fd 910f outi LED_PORT, 0xf1
|
||||
0000fe d03e rcall delay_50ms
|
||||
0000ff e011 ldi r17, 0x01
|
||||
000100 e033 ldi r19, 3
|
||||
00012e 930f
|
||||
00012f ef01
|
||||
000130 bb0b
|
||||
000131 910f outi LED_PORT, 0xf1
|
||||
000132 d042 rcall delay_50ms
|
||||
000133 e011 ldi r17, 0x01
|
||||
000134 e033 ldi r19, 3
|
||||
_eff_1_shift_l: ; Shift bits to left loop
|
||||
000101 ef20 ldi r18, 0xf0
|
||||
000102 0f11 lsl r17
|
||||
000103 0f21 add r18, r17
|
||||
000104 bb2b out LED_PORT, r18
|
||||
000105 d037 rcall delay_50ms
|
||||
000106 953a dec r19
|
||||
000107 f7c9 brne _eff_1_shift_l
|
||||
000135 ef20 ldi r18, 0xf0
|
||||
000136 0f11 lsl r17
|
||||
000137 0f21 add r18, r17
|
||||
000138 bb2b out LED_PORT, r18
|
||||
000139 d03b rcall delay_50ms
|
||||
00013a 953a dec r19
|
||||
00013b f7c9 brne _eff_1_shift_l
|
||||
|
||||
000108 930f
|
||||
000109 ef08
|
||||
00010a bb0b
|
||||
00010b 910f outi LED_PORT, 0xf8
|
||||
00010c d030 rcall delay_50ms
|
||||
00010d e018 ldi r17, 0x08
|
||||
00010e e033 ldi r19, 3
|
||||
00013c 930f
|
||||
00013d ef08
|
||||
00013e bb0b
|
||||
00013f 910f outi LED_PORT, 0xf8
|
||||
000140 d034 rcall delay_50ms
|
||||
000141 e018 ldi r17, 0x08
|
||||
000142 e033 ldi r19, 3
|
||||
_eff_1_shift_r: ; Shift bits to right loop
|
||||
00010f ef20 ldi r18, 0xf0
|
||||
000110 9516 lsr r17
|
||||
000111 0f21 add r18, r17
|
||||
000112 bb2b out LED_PORT, r18
|
||||
000113 d029 rcall delay_50ms
|
||||
000114 953a dec r19
|
||||
000115 f7c9 brne _eff_1_shift_r
|
||||
000143 ef20 ldi r18, 0xf0
|
||||
000144 9516 lsr r17
|
||||
000145 0f21 add r18, r17
|
||||
000146 bb2b out LED_PORT, r18
|
||||
000147 d02d rcall delay_50ms
|
||||
000148 953a dec r19
|
||||
000149 f7c9 brne _eff_1_shift_r
|
||||
|
||||
;
|
||||
; Out saved PORT values
|
||||
000116 bb4b out LED_PORT, r20
|
||||
000117 9508 ret
|
||||
00014a bb4b out LED_PORT, r20
|
||||
00014b 914f pop r20
|
||||
00014c 913f pop r19
|
||||
00014d 912f pop r18
|
||||
00014e 911f pop r17
|
||||
00014f 9508 ret
|
||||
|
||||
init_interrupts:
|
||||
;
|
||||
; Enable Port Change Interrupt
|
||||
000118 e100 ldi temp_r, (1<<PCIE0)
|
||||
000119 bf0b out GIMSK, temp_r
|
||||
000150 e100 ldi temp_r, (1<<PCIE0)
|
||||
000151 bf0b out GIMSK, temp_r
|
||||
|
||||
;
|
||||
; Set Pin Change Mask Register
|
||||
00011a ef00 ldi temp_r, (1<<PCINT4) | (1<<PCINT5)| (1<<PCINT6) | (1<<PCINT7)
|
||||
00011b bb02 out PCMSK0, temp_r
|
||||
000152 ef00 ldi temp_r, (1<<PCINT4) | (1<<PCINT5)| (1<<PCINT6) | (1<<PCINT7)
|
||||
000153 bb02 out PCMSK0, temp_r
|
||||
|
||||
00011c 2700 clr temp_r
|
||||
00011d 9508 ret
|
||||
000154 2700 clr temp_r
|
||||
000155 9508 ret
|
||||
|
||||
init_buzzer:
|
||||
00011e 98ba cbi BUZZ_DIR, BUZZ_PIN
|
||||
000156 98ba cbi BUZZ_DIR, BUZZ_PIN
|
||||
|
||||
; Setup timer
|
||||
00011f e402 ldi temp_r, (1<<COM0A0) | (1<<WGM01) ; Set CTC timer mode and toggle OC0A pin on Compare Match
|
||||
000120 bf00 out TCCR0A, temp_r
|
||||
000157 e402 ldi temp_r, (1<<COM0A0) | (1<<WGM01) ; Set CTC timer mode and toggle OC0A pin on Compare Match
|
||||
000158 bf00 out TCCR0A, temp_r
|
||||
|
||||
000121 ef0f ldi temp_r, 255
|
||||
000122 bf06 out OCR0A, temp_r
|
||||
000159 ef0f ldi temp_r, 255
|
||||
00015a bf06 out OCR0A, temp_r
|
||||
|
||||
000123 e002 ldi temp_r, (1<<CS01) ; Prescale on 8
|
||||
000124 bf03 out TCCR0B, temp_r
|
||||
00015b e002 ldi temp_r, (1<<CS01) ; Prescale on 8
|
||||
00015c bf03 out TCCR0B, temp_r
|
||||
|
||||
000125 e001 ldi temp_r, (1<<TOIE0) ; Enable Timer/Counter0 Overflow Interrupt
|
||||
000126 bf09 out TIMSK0, temp_r
|
||||
000127 9508 ret
|
||||
00015d e001 ldi temp_r, (1<<TOIE0) ; Enable Timer/Counter0 Overflow Interrupt
|
||||
00015e bf09 out TIMSK0, temp_r
|
||||
00015f 9508 ret
|
||||
|
||||
init_ports: ; Init MCU ports
|
||||
000128 e00f ldi temp_r, 0x0f ; Setup PORTA
|
||||
000129 bb0a out DDRA, temp_r ; Set directions of leds and buttons
|
||||
00012a 9502 swap temp_r
|
||||
00012b bb0b out PORTA, temp_r ; Set low signal on leds and pull-up on buttons
|
||||
000160 e00f ldi temp_r, 0x0f ; Setup PORTA
|
||||
000161 bb0a out DDRA, temp_r ; Set directions of leds and buttons
|
||||
000162 9502 swap temp_r
|
||||
000163 bb0b out PORTA, temp_r ; Set low signal on leds and pull-up on buttons
|
||||
|
||||
; Setup PORTB
|
||||
00012c 9aba sbi DDRB, BUZZ_PIN ; Set direction of buzzer pin to output
|
||||
00012d 98c2 cbi PORTB, BUZZ_PIN ; Set low signal on buzzer
|
||||
00012e 9508 ret
|
||||
000164 9aba sbi DDRB, BUZZ_PIN ; Set direction of buzzer pin to output
|
||||
000165 98c2 cbi PORTB, BUZZ_PIN ; Set low signal on buzzer
|
||||
000166 9508 ret
|
||||
|
||||
delay: ; For 1MHz frequency
|
||||
00012f 932f push r18
|
||||
000130 934f push r20
|
||||
000131 ef2f ldi r18, 255
|
||||
000132 2f43 mov r20, delay_counter_r
|
||||
000167 932f push r18
|
||||
000168 934f push r20
|
||||
000169 ef2f ldi r18, 255
|
||||
00016a 2f43 mov r20, delay_counter_r
|
||||
_delay_loop:
|
||||
000133 0000 nop
|
||||
000134 952a dec r18
|
||||
000135 f7e9 brne _delay_loop
|
||||
000136 0000 nop
|
||||
000137 954a dec r20
|
||||
000138 f7d1 brne _delay_loop
|
||||
000139 0000 nop
|
||||
00013a 914f pop r20
|
||||
00013b 912f pop r18
|
||||
00013c 9508 ret
|
||||
00016b 0000 nop
|
||||
00016c 952a dec r18
|
||||
00016d f7e9 brne _delay_loop
|
||||
00016e 0000 nop
|
||||
00016f 954a dec r20
|
||||
000170 f7d1 brne _delay_loop
|
||||
000171 0000 nop
|
||||
000172 914f pop r20
|
||||
000173 912f pop r18
|
||||
000174 9508 ret
|
||||
|
||||
delay_50ms: ; For 1MHz frequency
|
||||
00013d 932f push r18
|
||||
00013e 933f push r19
|
||||
000175 932f push r18
|
||||
000176 933f push r19
|
||||
|
||||
00013f e421 ldi r18, 65
|
||||
000140 ee3f ldi r19, 239
|
||||
000177 e421 ldi r18, 65
|
||||
000178 ee3f ldi r19, 239
|
||||
_loop_d_50ms:
|
||||
000141 953a dec r19
|
||||
000142 f7f1 brne _loop_d_50ms
|
||||
000143 952a dec r18
|
||||
000144 f7e1 brne _loop_d_50ms
|
||||
000145 0000 nop
|
||||
000146 913f pop r19
|
||||
000147 912f pop r18
|
||||
000148 9508 ret
|
||||
000179 953a dec r19
|
||||
00017a f7f1 brne _loop_d_50ms
|
||||
00017b 952a dec r18
|
||||
00017c f7e1 brne _loop_d_50ms
|
||||
00017d 0000 nop
|
||||
00017e 913f pop r19
|
||||
00017f 912f pop r18
|
||||
000180 9508 ret
|
||||
|
||||
|
||||
delay_1s: ; For 1MHz frequency
|
||||
.equ outer_count = 100
|
||||
.equ inner_count = 2499
|
||||
|
||||
000149 e624 ldi r18, outer_count
|
||||
000181 e624 ldi r18, outer_count
|
||||
_reset:
|
||||
00014a ec83 ldi r24, low(inner_count)
|
||||
00014b e099 ldi r25, high(inner_count)
|
||||
000182 ec83 ldi r24, low(inner_count)
|
||||
000183 e099 ldi r25, high(inner_count)
|
||||
_loop:
|
||||
00014c 9701 sbiw r24, 1
|
||||
00014d f7f1 brne _loop
|
||||
00014e 952a dec r18
|
||||
00014f f7d1 brne _reset
|
||||
000150 e624 ldi r18, outer_count
|
||||
000151 9508 ret
|
||||
000184 9701 sbiw r24, 1
|
||||
000185 f7f1 brne _loop
|
||||
000186 952a dec r18
|
||||
000187 f7d1 brne _reset
|
||||
000188 e624 ldi r18, outer_count
|
||||
000189 9508 ret
|
||||
|
||||
000152 654d
|
||||
000153 6f6d
|
||||
000154 7972
|
||||
000155 6c20
|
||||
000156 6465
|
||||
000157 6720
|
||||
000158 6d61
|
||||
000159 2e65
|
||||
00015a 5720
|
||||
00015b 6972
|
||||
00015c 7474
|
||||
00015d 6e65
|
||||
00015e 6220
|
||||
00015f 2079
|
||||
000160 6553
|
||||
000161 6772
|
||||
000162 7965
|
||||
000163 5920
|
||||
000164 7261
|
||||
000165 6f6b
|
||||
000166 2076
|
||||
000167 3732
|
||||
000168 302e
|
||||
000169 2e39
|
||||
00016a 3032
|
||||
00018a 654d
|
||||
00018b 6f6d
|
||||
00018c 7972
|
||||
00018d 6c20
|
||||
00018e 6465
|
||||
00018f 6720
|
||||
000190 6d61
|
||||
000191 2e65
|
||||
000192 5720
|
||||
000193 6972
|
||||
000194 7474
|
||||
000195 6e65
|
||||
000196 6220
|
||||
000197 2079
|
||||
000198 6553
|
||||
000199 6772
|
||||
00019a 7965
|
||||
00019b 5920
|
||||
00019c 7261
|
||||
00019d 6f6b
|
||||
00019e 2076
|
||||
00019f 3732
|
||||
0001a0 302e
|
||||
0001a1 2e39
|
||||
0001a2 3032
|
||||
|
||||
|
||||
RESOURCE USE INFORMATION
|
||||
@ -1353,38 +1415,38 @@ counted separately from r26..r31 here.
|
||||
.dseg memory usage only counts static data declared with .byte
|
||||
|
||||
"ATtiny24A" register use summary:
|
||||
x : 0 y : 2 z : 0 r0 : 0 r1 : 0 r2 : 0 r3 : 0 r4 : 0
|
||||
x : 0 y : 2 z : 1 r0 : 0 r1 : 0 r2 : 0 r3 : 0 r4 : 0
|
||||
r5 : 0 r6 : 0 r7 : 0 r8 : 0 r9 : 0 r10: 0 r11: 0 r12: 0
|
||||
r13: 0 r14: 0 r15: 0 r16: 79 r17: 21 r18: 29 r19: 13 r20: 6
|
||||
r21: 4 r22: 5 r23: 15 r24: 2 r25: 1 r26: 10 r27: 0 r28: 2
|
||||
r29: 2 r30: 0 r31: 0
|
||||
Registers used: 14 out of 35 (40.0%)
|
||||
r13: 0 r14: 0 r15: 0 r16: 85 r17: 24 r18: 36 r19: 16 r20: 12
|
||||
r21: 4 r22: 5 r23: 15 r24: 4 r25: 4 r26: 15 r27: 0 r28: 2
|
||||
r29: 2 r30: 2 r31: 2
|
||||
Registers used: 17 out of 35 (48.6%)
|
||||
|
||||
"ATtiny24A" instruction use summary:
|
||||
.lds : 0 .sts : 0 adc : 0 add : 3 adiw : 0 and : 0
|
||||
andi : 1 asr : 0 bclr : 0 bld : 0 brbc : 0 brbs : 0
|
||||
brcc : 0 brcs : 0 break : 0 breq : 5 brge : 0 brhc : 0
|
||||
andi : 3 asr : 0 bclr : 0 bld : 0 brbc : 0 brbs : 0
|
||||
brcc : 0 brcs : 0 break : 0 breq : 6 brge : 0 brhc : 0
|
||||
brhs : 0 brid : 0 brie : 0 brlo : 5 brlt : 0 brmi : 0
|
||||
brne : 20 brpl : 0 brsh : 0 brtc : 0 brts : 0 brvc : 0
|
||||
brvs : 0 bset : 0 bst : 0 cbi : 18 cbr : 0 clc : 0
|
||||
clh : 0 cli : 0 cln : 0 clr : 5 cls : 0 clt : 0
|
||||
clv : 0 clz : 0 com : 0 cp : 0 cpc : 0 cpi : 21
|
||||
cpse : 0 dec : 10 eor : 1 icall : 0 ijmp : 0 in : 5
|
||||
inc : 0 ld : 1 ldd : 0 ldi : 47 lds : 6 lpm : 0
|
||||
lsl : 1 lsr : 1 mov : 2 movw : 0 neg : 0 nop : 5
|
||||
or : 0 ori : 0 out : 25 pop : 21 push : 21 rcall : 25
|
||||
ret : 14 reti : 16 rjmp : 16 rol : 0 ror : 0 sbc : 0
|
||||
brne : 21 brpl : 0 brsh : 0 brtc : 0 brts : 0 brvc : 0
|
||||
brvs : 0 bset : 0 bst : 0 cbi : 19 cbr : 0 clc : 0
|
||||
clh : 0 cli : 0 cln : 0 clr : 8 cls : 0 clt : 0
|
||||
clv : 0 clz : 0 com : 0 cp : 2 cpc : 0 cpi : 21
|
||||
cpse : 0 dec : 10 eor : 1 icall : 0 ijmp : 0 in : 6
|
||||
inc : 1 ld : 2 ldd : 0 ldi : 55 lds : 6 lpm : 0
|
||||
lsl : 1 lsr : 1 mov : 3 movw : 0 neg : 0 nop : 5
|
||||
or : 0 ori : 0 out : 26 pop : 28 push : 27 rcall : 36
|
||||
ret : 17 reti : 16 rjmp : 16 rol : 0 ror : 0 sbc : 0
|
||||
sbci : 0 sbi : 17 sbic : 0 sbis : 0 sbiw : 1 sbr : 0
|
||||
sbrc : 0 sbrs : 0 sec : 0 seh : 0 sei : 1 sen : 0
|
||||
ser : 0 ses : 0 set : 0 sev : 0 sez : 0 sleep : 0
|
||||
spm : 0 st : 1 std : 0 sts : 7 sub : 0 subi : 1
|
||||
spm : 0 st : 1 std : 0 sts : 10 sub : 0 subi : 1
|
||||
swap : 2 tst : 0 wdr : 0
|
||||
Instructions used: 32 out of 105 (30.5%)
|
||||
Instructions used: 34 out of 105 (32.4%)
|
||||
|
||||
"ATtiny24A" memory use summary [bytes]:
|
||||
Segment Begin End Code Data Used Size Use%
|
||||
---------------------------------------------------------------
|
||||
[.cseg] 0x000000 0x0002d8 676 52 728 2048 35.5%
|
||||
[.cseg] 0x000000 0x000348 788 52 840 2048 41.0%
|
||||
[.dseg] 0x000060 0x000063 0 3 3 128 2.3%
|
||||
[.eseg] 0x000000 0x000000 0 0 0 128 0.0%
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user