commit 087fc754d93970b19c1f5d831a22ca555f7ef94a Author: sergeyyarkov Date: Fri Sep 11 12:57:14 2026 +0300 makefile diff --git a/.clang-format b/.clang-format new file mode 100644 index 0000000..539acde --- /dev/null +++ b/.clang-format @@ -0,0 +1,6 @@ +BasedOnStyle: Google + +ColumnLimit: 120 +PointerAlignment: Right +IndentPPDirectives: AfterHash +SortIncludes: Never \ No newline at end of file diff --git a/.clangd b/.clangd new file mode 100644 index 0000000..868d3f9 --- /dev/null +++ b/.clangd @@ -0,0 +1,2 @@ +Diagnostics: + Suppress: "pp_including_mainfile_in_preamble" \ No newline at end of file diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..ece256a --- /dev/null +++ b/.gitignore @@ -0,0 +1,3 @@ +.cache +compile_commands.json +build \ No newline at end of file diff --git a/.vscode/c_cpp_properties.json b/.vscode/c_cpp_properties.json new file mode 100644 index 0000000..1134dd0 --- /dev/null +++ b/.vscode/c_cpp_properties.json @@ -0,0 +1,21 @@ +{ + "configurations": [ + { + "name": "CH32V003", + "compilerPath": "/opt/wch/MRS_Toolchain/RISC-V Embedded GCC15/bin/riscv32-wch-elf-gcc", + "compilerArgs": [ + "-march=rv32ec_zicsr", + "-mabi=ilp32e", + "-Werror=implicit-function-declaration" + ], + "includePath": [ + "${workspaceFolder}/**", + "/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/**", + "/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/**" + ], + "cStandard": "gnu11", + "intelliSenseMode": "linux-gcc-arm" + } + ], + "version": 4 +} \ No newline at end of file diff --git a/.vscode/settings.json b/.vscode/settings.json new file mode 100644 index 0000000..a984499 --- /dev/null +++ b/.vscode/settings.json @@ -0,0 +1,3 @@ +{ + "C_Cpp.intelliSenseEngine": "disabled", +} \ No newline at end of file diff --git a/Makefile b/Makefile new file mode 100644 index 0000000..2e5bef1 --- /dev/null +++ b/Makefile @@ -0,0 +1,105 @@ +.DEFAULT_GOAL := all +.PHONY: all asms binary clean size test prog_flash prog_test format compiledb + + +TARGET=firmware +PLATFORM?=ch32 +BUILD_CONFIGS_MK=$(basename $(notdir $(shell find ./build_config -name "*.mk"))) + + + +# === Directories path ============================================================================= +SRC_DIR=./src +OBJ_DIR=./obj/$(PLATFORM) +ASM_DIR=./asm/$(PLATFORM) +OUT_DIR=./build/$(PLATFORM) +# ================================================================================================== + + + +# === Compiler options ============================================================================= +CC_FLAGS=-Wall -Wextra +ifeq ($(DEBUG), true) +CC_FLAGS+=-ggdb -Og +CC_FLAGS+=-Wl,-Map=$(OUT_DIR)/$(TARGET).map +CC_FLAGS+=-DDEBUG_BUILD=TRUE +else +CC_FLAGS+=-Os +CC_FLAGS+=-flto +endif +CC_FLAGS+=-std=gnu11 +CC_FLAGS+=-MMD -MP +CC_FLAGS+=-I$(SRC_DIR) +CC_FLAGS+=-Wno-unused-parameter +CC_FLAGS+=-ffunction-sections +CC_FLAGS+=-fdata-sections +# ================================================================================================== + + + +# === Linker options =============================================================================== +LD_FLAGS+=--specs=nano.specs # Use optimized standard C library +LD_FLAGS+=-nostartfiles +LD_FLAGS+=-Wl,--relax +LD_FLAGS+=-Wl,--gc-sections +# ================================================================================================== + + + +PROJ_SRCS=$(shell find $(SRC_DIR) -name "*.c") +OBJS=$(patsubst $(SRC_DIR)/%.c,$(OBJ_DIR)/%.o,$(PROJ_SRCS)) +ASMS=$(patsubst $(SRC_DIR)/%.c,$(ASM_DIR)/%.S,$(PROJ_SRCS)) + + +ifneq (, $(filter $(PLATFORM), $(BUILD_CONFIGS_MK))) +include build_config/$(PLATFORM).mk +else +$(error Cannot find build config for platform: $(PLATFORM)) +endif + +DEPS=$(OBJS:.o=.d) + + + +all: binary size +binary: $(OUT_DIR)/$(TARGET).bin +asms: $(ASMS) + +$(OUT_DIR)/$(TARGET).bin: $(OUT_DIR)/$(TARGET).elf $(OUT_DIR)/$(TARGET).S + $(OBJCOPY) -O binary $< $@ + +$(OUT_DIR)/$(TARGET).elf: $(OBJS) | $(OUT_DIR) + $(CC) $(CC_FLAGS) $(LD_FLAGS) $^ -o $@ + +$(OUT_DIR)/$(TARGET).S: $(OUT_DIR)/$(TARGET).elf | $(OUT_DIR) + $(OBJDUMP) -D $< > $@ + +## Compile to object files +$(OBJ_DIR)/%.o: $(SRC_DIR)/%.c + @mkdir -p $(dir $@) + $(CC) $(CC_FLAGS) -c $< -o $@ + +## Compile to assembler files (optional) +$(ASM_DIR)/%.S: $(SRC_DIR)/%.c + @mkdir -p $(dir $@) + $(CC) -S -fverbose-asm $(CC_FLAGS) -c $< -o $@ + +$(OUT_DIR): + mkdir -p $@ + +clean: + rm -rf $(OBJ_DIR) + rm -rf $(OUT_DIR) + rm -rf $(ASM_DIR) + +size: $(OUT_DIR)/$(TARGET).elf + $(SIZE) -B $< + +format: + find . -type f \( -name "*.cpp" -o -name "*.hpp" -o -name "*.c" -o -name "*.h" \) -exec clang-format --style=file:.clang-format -i {} + + +compiledb: + @make clean + @bear -- make all + +-include $(DEPS) \ No newline at end of file diff --git a/build_config/ch32.mk b/build_config/ch32.mk new file mode 100644 index 0000000..3e9144c --- /dev/null +++ b/build_config/ch32.mk @@ -0,0 +1,52 @@ +# === Directories path ============================================================================= +EVT_DIR=/opt/wch/CH32V003EVT/EVT/EXAM/SRC +# ================================================================================================== + + + +# === Toolchain ==================================================================================== +OBJCOPY=riscv32-wch-elf-objcopy +OBJDUMP=riscv32-wch-elf-objdump +SIZE=riscv32-wch-elf-size +CC=riscv32-wch-elf-gcc +FLASHER_TOOL=wlink +# ================================================================================================== + + + +# === Compiler options ============================================================================= +CC_FLAGS+=-march=rv32ec_zicsr +CC_FLAGS+=-mabi=ilp32e +CC_FLAGS+=-I$(EVT_DIR)/Core +CC_FLAGS+=-I$(EVT_DIR)/Peripheral/inc +# ================================================================================================== + + + +# === Linker options =============================================================================== +LDSCRIPT+=./ld/Link.ld +LD_FLAGS+=-T$(LDSCRIPT) +# ================================================================================================== + +# Adds WCH SDK to compile flow +STARTUP_SRC=./startup_ch32v00x.S +EVT_SRCS=$(shell find $(EVT_DIR)/Core -name "*.c") +EVT_SRCS+=$(shell find $(EVT_DIR)/Peripheral -name "*.c") +OBJS+=$(patsubst $(EVT_DIR)/%.c,$(OBJ_DIR)/evt/%.o,$(EVT_SRCS)) +OBJS+=$(OBJ_DIR)/startup_ch32v00x.o + +prog_flash: $(OUT_DIR)/$(TARGET).bin + $(FLASHER_TOOL) flash $< + +prog_test: + $(FLASHER_TOOL) status + + +# Compile SDK and init sources +$(OBJ_DIR)/evt/%.o: $(EVT_DIR)/%.c + @mkdir -p $(dir $@) + $(CC) $(CC_FLAGS) -c $< -o $@ + +$(OBJ_DIR)/startup_ch32v00x.o: $(STARTUP_SRC) + @mkdir -p $(dir $@) + $(CC) $(CC_FLAGS) -c $< -o $@ \ No newline at end of file diff --git a/ld/Link.ld b/ld/Link.ld new file mode 100644 index 0000000..f7c6ecf --- /dev/null +++ b/ld/Link.ld @@ -0,0 +1,175 @@ +ENTRY( _start ) + +__stack_size = 256; + +PROVIDE( _stack_size = __stack_size ); + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 16K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 2K +} + +SECTIONS +{ + .init : + { + _sinit = .; + . = ALIGN(4); + KEEP(*(SORT_NONE(.init))) + . = ALIGN(4); + _einit = .; + } >FLASH AT>FLASH + + .highcodelalign : + { + . = ALIGN(4); + PROVIDE(_highcode_lma = .); + } >FLASH AT>FLASH + + .highcode : + { + . = ALIGN(4); + PROVIDE(_highcode_vma_start = .); + *(.highcode); + *(.highcode.*); + . = ALIGN(4); + PROVIDE(_highcode_vma_end = .); + } >RAM AT>FLASH + + .text : + { + . = ALIGN(4); + *(.text) + *(.text.*) + *(.rodata) + *(.rodata*) + *(.gnu.linkonce.t.*) + . = ALIGN(4); + } >FLASH AT>FLASH + + .fini : + { + KEEP(*(SORT_NONE(.fini))) + . = ALIGN(4); + } >FLASH AT>FLASH + + PROVIDE( _etext = . ); + PROVIDE( _eitcm = . ); + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH AT>FLASH + + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) + KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH AT>FLASH + + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*))) + KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH AT>FLASH + + .ctors : + { + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*crtbegin?.o(.ctors)) + /* We don't want to include the .ctor section from + the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + } >FLASH AT>FLASH + + .dtors : + { + KEEP (*crtbegin.o(.dtors)) + KEEP (*crtbegin?.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } >FLASH AT>FLASH + + .dalign : + { + . = ALIGN(4); + PROVIDE(_data_vma = .); + } >RAM AT>FLASH + + .dlalign : + { + . = ALIGN(4); + PROVIDE(_data_lma = .); + } >FLASH AT>FLASH + + .data : + { + . = ALIGN(4); + *(.gnu.linkonce.r.*) + *(.data .data.*) + *(.gnu.linkonce.d.*) + . = ALIGN(8); + PROVIDE( __global_pointer$ = . + 0x800 ); + *(.sdata .sdata.*) + *(.sdata2*) + *(.gnu.linkonce.s.*) + . = ALIGN(8); + *(.srodata.cst16) + *(.srodata.cst8) + *(.srodata.cst4) + *(.srodata.cst2) + *(.srodata .srodata.*) + . = ALIGN(4); + PROVIDE( _edata = .); + } >RAM AT>FLASH + + .bss : + { + . = ALIGN(4); + PROVIDE( _sbss = .); + *(.sbss*) + *(.gnu.linkonce.sb.*) + *(.bss*) + *(.gnu.linkonce.b.*) + *(COMMON*) + . = ALIGN(4); + PROVIDE( _ebss = .); + } >RAM AT>FLASH + + PROVIDE( _end = _ebss); + PROVIDE( end = . ); + + .stack ORIGIN(RAM) + LENGTH(RAM) - __stack_size : + { + PROVIDE( _heap_end = . ); + . = ALIGN(4); + PROVIDE(_susrstack = . ); + . = . + __stack_size; + PROVIDE( _eusrstack = .); + } >RAM + +} + + + diff --git a/obj/ch32/ch32v00x_it.d b/obj/ch32/ch32v00x_it.d new file mode 100644 index 0000000..4ab7fc9 --- /dev/null +++ b/obj/ch32/ch32v00x_it.d @@ -0,0 +1,43 @@ +obj/ch32/ch32v00x_it.o: src/ch32v00x_it.c src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/ch32/ch32v00x_it.o b/obj/ch32/ch32v00x_it.o new file mode 100644 index 0000000..6a146dc Binary files /dev/null and b/obj/ch32/ch32v00x_it.o differ diff --git a/obj/ch32/debug.d b/obj/ch32/debug.d new file mode 100644 index 0000000..eeabb69 --- /dev/null +++ b/obj/ch32/debug.d @@ -0,0 +1,45 @@ +obj/ch32/debug.o: src/debug.c src/debug.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +src/debug.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/ch32/debug.o b/obj/ch32/debug.o new file mode 100644 index 0000000..23dd3e5 Binary files /dev/null and b/obj/ch32/debug.o differ diff --git a/obj/ch32/evt/Core/core_riscv.d b/obj/ch32/evt/Core/core_riscv.d new file mode 100644 index 0000000..63fd9d4 --- /dev/null +++ b/obj/ch32/evt/Core/core_riscv.d @@ -0,0 +1,2 @@ +obj/ch32/evt/Core/core_riscv.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.c diff --git a/obj/ch32/evt/Core/core_riscv.o b/obj/ch32/evt/Core/core_riscv.o new file mode 100644 index 0000000..9b8acc5 Binary files /dev/null and b/obj/ch32/evt/Core/core_riscv.o differ diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_adc.d b/obj/ch32/evt/Peripheral/src/ch32v00x_adc.d new file mode 100644 index 0000000..defce9c --- /dev/null +++ b/obj/ch32/evt/Peripheral/src/ch32v00x_adc.d @@ -0,0 +1,45 @@ +obj/ch32/evt/Peripheral/src/ch32v00x_adc.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_adc.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_adc.o b/obj/ch32/evt/Peripheral/src/ch32v00x_adc.o new file mode 100644 index 0000000..701062a Binary files /dev/null and b/obj/ch32/evt/Peripheral/src/ch32v00x_adc.o differ diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_dbgmcu.d b/obj/ch32/evt/Peripheral/src/ch32v00x_dbgmcu.d new file mode 100644 index 0000000..3eb88ff --- /dev/null +++ b/obj/ch32/evt/Peripheral/src/ch32v00x_dbgmcu.d @@ -0,0 +1,45 @@ +obj/ch32/evt/Peripheral/src/ch32v00x_dbgmcu.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_dbgmcu.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_dbgmcu.o b/obj/ch32/evt/Peripheral/src/ch32v00x_dbgmcu.o new file mode 100644 index 0000000..f1fac9e Binary files /dev/null and b/obj/ch32/evt/Peripheral/src/ch32v00x_dbgmcu.o differ diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_dma.d b/obj/ch32/evt/Peripheral/src/ch32v00x_dma.d new file mode 100644 index 0000000..6afeb5b --- /dev/null +++ b/obj/ch32/evt/Peripheral/src/ch32v00x_dma.d @@ -0,0 +1,45 @@ +obj/ch32/evt/Peripheral/src/ch32v00x_dma.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_dma.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_dma.o b/obj/ch32/evt/Peripheral/src/ch32v00x_dma.o new file mode 100644 index 0000000..dfb4bcc Binary files /dev/null and b/obj/ch32/evt/Peripheral/src/ch32v00x_dma.o differ diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_exti.d b/obj/ch32/evt/Peripheral/src/ch32v00x_exti.d new file mode 100644 index 0000000..3488ba3 --- /dev/null +++ b/obj/ch32/evt/Peripheral/src/ch32v00x_exti.d @@ -0,0 +1,45 @@ +obj/ch32/evt/Peripheral/src/ch32v00x_exti.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_exti.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_exti.o b/obj/ch32/evt/Peripheral/src/ch32v00x_exti.o new file mode 100644 index 0000000..d6a25f0 Binary files /dev/null and b/obj/ch32/evt/Peripheral/src/ch32v00x_exti.o differ diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_flash.d b/obj/ch32/evt/Peripheral/src/ch32v00x_flash.d new file mode 100644 index 0000000..02e9794 --- /dev/null +++ b/obj/ch32/evt/Peripheral/src/ch32v00x_flash.d @@ -0,0 +1,45 @@ +obj/ch32/evt/Peripheral/src/ch32v00x_flash.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_flash.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_flash.o b/obj/ch32/evt/Peripheral/src/ch32v00x_flash.o new file mode 100644 index 0000000..7ace8d0 Binary files /dev/null and b/obj/ch32/evt/Peripheral/src/ch32v00x_flash.o differ diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_gpio.d b/obj/ch32/evt/Peripheral/src/ch32v00x_gpio.d new file mode 100644 index 0000000..3c80295 --- /dev/null +++ b/obj/ch32/evt/Peripheral/src/ch32v00x_gpio.d @@ -0,0 +1,45 @@ +obj/ch32/evt/Peripheral/src/ch32v00x_gpio.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_gpio.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_gpio.o b/obj/ch32/evt/Peripheral/src/ch32v00x_gpio.o new file mode 100644 index 0000000..6b93976 Binary files /dev/null and b/obj/ch32/evt/Peripheral/src/ch32v00x_gpio.o differ diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_i2c.d b/obj/ch32/evt/Peripheral/src/ch32v00x_i2c.d new file mode 100644 index 0000000..77f1f37 --- /dev/null +++ b/obj/ch32/evt/Peripheral/src/ch32v00x_i2c.d @@ -0,0 +1,45 @@ +obj/ch32/evt/Peripheral/src/ch32v00x_i2c.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_i2c.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_i2c.o b/obj/ch32/evt/Peripheral/src/ch32v00x_i2c.o new file mode 100644 index 0000000..b38425a Binary files /dev/null and b/obj/ch32/evt/Peripheral/src/ch32v00x_i2c.o differ diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_iwdg.d b/obj/ch32/evt/Peripheral/src/ch32v00x_iwdg.d new file mode 100644 index 0000000..4304f11 --- /dev/null +++ b/obj/ch32/evt/Peripheral/src/ch32v00x_iwdg.d @@ -0,0 +1,45 @@ +obj/ch32/evt/Peripheral/src/ch32v00x_iwdg.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_iwdg.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_iwdg.o b/obj/ch32/evt/Peripheral/src/ch32v00x_iwdg.o new file mode 100644 index 0000000..08b3536 Binary files /dev/null and b/obj/ch32/evt/Peripheral/src/ch32v00x_iwdg.o differ diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_misc.d b/obj/ch32/evt/Peripheral/src/ch32v00x_misc.d new file mode 100644 index 0000000..173410d --- /dev/null +++ b/obj/ch32/evt/Peripheral/src/ch32v00x_misc.d @@ -0,0 +1,45 @@ +obj/ch32/evt/Peripheral/src/ch32v00x_misc.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_misc.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_misc.o b/obj/ch32/evt/Peripheral/src/ch32v00x_misc.o new file mode 100644 index 0000000..03e6460 Binary files /dev/null and b/obj/ch32/evt/Peripheral/src/ch32v00x_misc.o differ diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_opa.d b/obj/ch32/evt/Peripheral/src/ch32v00x_opa.d new file mode 100644 index 0000000..38104f5 --- /dev/null +++ b/obj/ch32/evt/Peripheral/src/ch32v00x_opa.d @@ -0,0 +1,45 @@ +obj/ch32/evt/Peripheral/src/ch32v00x_opa.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_opa.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_opa.o b/obj/ch32/evt/Peripheral/src/ch32v00x_opa.o new file mode 100644 index 0000000..e04a902 Binary files /dev/null and b/obj/ch32/evt/Peripheral/src/ch32v00x_opa.o differ diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_pwr.d b/obj/ch32/evt/Peripheral/src/ch32v00x_pwr.d new file mode 100644 index 0000000..3b27468 --- /dev/null +++ b/obj/ch32/evt/Peripheral/src/ch32v00x_pwr.d @@ -0,0 +1,45 @@ +obj/ch32/evt/Peripheral/src/ch32v00x_pwr.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_pwr.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_pwr.o b/obj/ch32/evt/Peripheral/src/ch32v00x_pwr.o new file mode 100644 index 0000000..7b0bd7c Binary files /dev/null and b/obj/ch32/evt/Peripheral/src/ch32v00x_pwr.o differ diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_rcc.d b/obj/ch32/evt/Peripheral/src/ch32v00x_rcc.d new file mode 100644 index 0000000..b4e73fc --- /dev/null +++ b/obj/ch32/evt/Peripheral/src/ch32v00x_rcc.d @@ -0,0 +1,45 @@ +obj/ch32/evt/Peripheral/src/ch32v00x_rcc.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_rcc.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_rcc.o b/obj/ch32/evt/Peripheral/src/ch32v00x_rcc.o new file mode 100644 index 0000000..c1d6ebf Binary files /dev/null and b/obj/ch32/evt/Peripheral/src/ch32v00x_rcc.o differ diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_spi.d b/obj/ch32/evt/Peripheral/src/ch32v00x_spi.d new file mode 100644 index 0000000..2f0f293 --- /dev/null +++ b/obj/ch32/evt/Peripheral/src/ch32v00x_spi.d @@ -0,0 +1,45 @@ +obj/ch32/evt/Peripheral/src/ch32v00x_spi.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_spi.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_spi.o b/obj/ch32/evt/Peripheral/src/ch32v00x_spi.o new file mode 100644 index 0000000..6e32b2f Binary files /dev/null and b/obj/ch32/evt/Peripheral/src/ch32v00x_spi.o differ diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_tim.d b/obj/ch32/evt/Peripheral/src/ch32v00x_tim.d new file mode 100644 index 0000000..e664031 --- /dev/null +++ b/obj/ch32/evt/Peripheral/src/ch32v00x_tim.d @@ -0,0 +1,45 @@ +obj/ch32/evt/Peripheral/src/ch32v00x_tim.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_tim.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_tim.o b/obj/ch32/evt/Peripheral/src/ch32v00x_tim.o new file mode 100644 index 0000000..bb66ae6 Binary files /dev/null and b/obj/ch32/evt/Peripheral/src/ch32v00x_tim.o differ diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_usart.d b/obj/ch32/evt/Peripheral/src/ch32v00x_usart.d new file mode 100644 index 0000000..1608ed8 --- /dev/null +++ b/obj/ch32/evt/Peripheral/src/ch32v00x_usart.d @@ -0,0 +1,45 @@ +obj/ch32/evt/Peripheral/src/ch32v00x_usart.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_usart.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_usart.o b/obj/ch32/evt/Peripheral/src/ch32v00x_usart.o new file mode 100644 index 0000000..1a5803c Binary files /dev/null and b/obj/ch32/evt/Peripheral/src/ch32v00x_usart.o differ diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_wwdg.d b/obj/ch32/evt/Peripheral/src/ch32v00x_wwdg.d new file mode 100644 index 0000000..a941153 --- /dev/null +++ b/obj/ch32/evt/Peripheral/src/ch32v00x_wwdg.d @@ -0,0 +1,45 @@ +obj/ch32/evt/Peripheral/src/ch32v00x_wwdg.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_wwdg.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/ch32/evt/Peripheral/src/ch32v00x_wwdg.o b/obj/ch32/evt/Peripheral/src/ch32v00x_wwdg.o new file mode 100644 index 0000000..bdf777d Binary files /dev/null and b/obj/ch32/evt/Peripheral/src/ch32v00x_wwdg.o differ diff --git a/obj/ch32/main.d b/obj/ch32/main.d new file mode 100644 index 0000000..47f1713 --- /dev/null +++ b/obj/ch32/main.d @@ -0,0 +1,45 @@ +obj/ch32/main.o: src/main.c src/debug.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +src/debug.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/ch32/main.o b/obj/ch32/main.o new file mode 100644 index 0000000..7d50953 Binary files /dev/null and b/obj/ch32/main.o differ diff --git a/obj/ch32/startup_ch32v00x.d b/obj/ch32/startup_ch32v00x.d new file mode 100644 index 0000000..d6ecf17 --- /dev/null +++ b/obj/ch32/startup_ch32v00x.d @@ -0,0 +1 @@ +obj/ch32/startup_ch32v00x.o: startup_ch32v00x.S diff --git a/obj/ch32/startup_ch32v00x.o b/obj/ch32/startup_ch32v00x.o new file mode 100644 index 0000000..708f9f6 Binary files /dev/null and b/obj/ch32/startup_ch32v00x.o differ diff --git a/obj/ch32/system_ch32v00x.d b/obj/ch32/system_ch32v00x.d new file mode 100644 index 0000000..6cd5e0c --- /dev/null +++ b/obj/ch32/system_ch32v00x.d @@ -0,0 +1,44 @@ +obj/ch32/system_ch32v00x.o: src/system_ch32v00x.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/ch32/system_ch32v00x.o b/obj/ch32/system_ch32v00x.o new file mode 100644 index 0000000..c1f2d12 Binary files /dev/null and b/obj/ch32/system_ch32v00x.o differ diff --git a/obj/ch32v00x_it.d b/obj/ch32v00x_it.d new file mode 100644 index 0000000..ee7a3eb --- /dev/null +++ b/obj/ch32v00x_it.d @@ -0,0 +1,43 @@ +obj/ch32v00x_it.o: src/ch32v00x_it.c src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/ch32v00x_it.o b/obj/ch32v00x_it.o new file mode 100644 index 0000000..4aacf3c Binary files /dev/null and b/obj/ch32v00x_it.o differ diff --git a/obj/debug.d b/obj/debug.d new file mode 100644 index 0000000..1ba59eb --- /dev/null +++ b/obj/debug.d @@ -0,0 +1,45 @@ +obj/debug.o: src/debug.c src/debug.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +src/debug.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/debug.o b/obj/debug.o new file mode 100644 index 0000000..d20273f Binary files /dev/null and b/obj/debug.o differ diff --git a/obj/evt/Core/core_riscv.d b/obj/evt/Core/core_riscv.d new file mode 100644 index 0000000..fbf7efc --- /dev/null +++ b/obj/evt/Core/core_riscv.d @@ -0,0 +1,2 @@ +obj/evt/Core/core_riscv.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.c diff --git a/obj/evt/Core/core_riscv.o b/obj/evt/Core/core_riscv.o new file mode 100644 index 0000000..d813a13 Binary files /dev/null and b/obj/evt/Core/core_riscv.o differ diff --git a/obj/evt/Peripheral/src/ch32v00x_adc.d b/obj/evt/Peripheral/src/ch32v00x_adc.d new file mode 100644 index 0000000..109ca6a --- /dev/null +++ b/obj/evt/Peripheral/src/ch32v00x_adc.d @@ -0,0 +1,45 @@ +obj/evt/Peripheral/src/ch32v00x_adc.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_adc.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/evt/Peripheral/src/ch32v00x_adc.o b/obj/evt/Peripheral/src/ch32v00x_adc.o new file mode 100644 index 0000000..f3a4191 Binary files /dev/null and b/obj/evt/Peripheral/src/ch32v00x_adc.o differ diff --git a/obj/evt/Peripheral/src/ch32v00x_dbgmcu.d b/obj/evt/Peripheral/src/ch32v00x_dbgmcu.d new file mode 100644 index 0000000..34f2be0 --- /dev/null +++ b/obj/evt/Peripheral/src/ch32v00x_dbgmcu.d @@ -0,0 +1,45 @@ +obj/evt/Peripheral/src/ch32v00x_dbgmcu.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_dbgmcu.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/evt/Peripheral/src/ch32v00x_dbgmcu.o b/obj/evt/Peripheral/src/ch32v00x_dbgmcu.o new file mode 100644 index 0000000..b5c8142 Binary files /dev/null and b/obj/evt/Peripheral/src/ch32v00x_dbgmcu.o differ diff --git a/obj/evt/Peripheral/src/ch32v00x_dma.d b/obj/evt/Peripheral/src/ch32v00x_dma.d new file mode 100644 index 0000000..a988d98 --- /dev/null +++ b/obj/evt/Peripheral/src/ch32v00x_dma.d @@ -0,0 +1,45 @@ +obj/evt/Peripheral/src/ch32v00x_dma.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_dma.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/evt/Peripheral/src/ch32v00x_dma.o b/obj/evt/Peripheral/src/ch32v00x_dma.o new file mode 100644 index 0000000..b08fe88 Binary files /dev/null and b/obj/evt/Peripheral/src/ch32v00x_dma.o differ diff --git a/obj/evt/Peripheral/src/ch32v00x_exti.d b/obj/evt/Peripheral/src/ch32v00x_exti.d new file mode 100644 index 0000000..c9219ea --- /dev/null +++ b/obj/evt/Peripheral/src/ch32v00x_exti.d @@ -0,0 +1,45 @@ +obj/evt/Peripheral/src/ch32v00x_exti.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_exti.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/evt/Peripheral/src/ch32v00x_exti.o b/obj/evt/Peripheral/src/ch32v00x_exti.o new file mode 100644 index 0000000..53c2b4d Binary files /dev/null and b/obj/evt/Peripheral/src/ch32v00x_exti.o differ diff --git a/obj/evt/Peripheral/src/ch32v00x_flash.d b/obj/evt/Peripheral/src/ch32v00x_flash.d new file mode 100644 index 0000000..c7aeb1e --- /dev/null +++ b/obj/evt/Peripheral/src/ch32v00x_flash.d @@ -0,0 +1,45 @@ +obj/evt/Peripheral/src/ch32v00x_flash.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_flash.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/evt/Peripheral/src/ch32v00x_flash.o b/obj/evt/Peripheral/src/ch32v00x_flash.o new file mode 100644 index 0000000..73ef911 Binary files /dev/null and b/obj/evt/Peripheral/src/ch32v00x_flash.o differ diff --git a/obj/evt/Peripheral/src/ch32v00x_gpio.d b/obj/evt/Peripheral/src/ch32v00x_gpio.d new file mode 100644 index 0000000..f2bf8b7 --- /dev/null +++ b/obj/evt/Peripheral/src/ch32v00x_gpio.d @@ -0,0 +1,45 @@ +obj/evt/Peripheral/src/ch32v00x_gpio.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_gpio.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/evt/Peripheral/src/ch32v00x_gpio.o b/obj/evt/Peripheral/src/ch32v00x_gpio.o new file mode 100644 index 0000000..5748c29 Binary files /dev/null and b/obj/evt/Peripheral/src/ch32v00x_gpio.o differ diff --git a/obj/evt/Peripheral/src/ch32v00x_i2c.d b/obj/evt/Peripheral/src/ch32v00x_i2c.d new file mode 100644 index 0000000..f583bf6 --- /dev/null +++ b/obj/evt/Peripheral/src/ch32v00x_i2c.d @@ -0,0 +1,45 @@ +obj/evt/Peripheral/src/ch32v00x_i2c.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_i2c.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/evt/Peripheral/src/ch32v00x_i2c.o b/obj/evt/Peripheral/src/ch32v00x_i2c.o new file mode 100644 index 0000000..e39e8ad Binary files /dev/null and b/obj/evt/Peripheral/src/ch32v00x_i2c.o differ diff --git a/obj/evt/Peripheral/src/ch32v00x_iwdg.d b/obj/evt/Peripheral/src/ch32v00x_iwdg.d new file mode 100644 index 0000000..fa276e6 --- /dev/null +++ b/obj/evt/Peripheral/src/ch32v00x_iwdg.d @@ -0,0 +1,45 @@ +obj/evt/Peripheral/src/ch32v00x_iwdg.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_iwdg.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/evt/Peripheral/src/ch32v00x_iwdg.o b/obj/evt/Peripheral/src/ch32v00x_iwdg.o new file mode 100644 index 0000000..a0d50dd Binary files /dev/null and b/obj/evt/Peripheral/src/ch32v00x_iwdg.o differ diff --git a/obj/evt/Peripheral/src/ch32v00x_misc.d b/obj/evt/Peripheral/src/ch32v00x_misc.d new file mode 100644 index 0000000..3ca3306 --- /dev/null +++ b/obj/evt/Peripheral/src/ch32v00x_misc.d @@ -0,0 +1,45 @@ +obj/evt/Peripheral/src/ch32v00x_misc.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_misc.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/evt/Peripheral/src/ch32v00x_misc.o b/obj/evt/Peripheral/src/ch32v00x_misc.o new file mode 100644 index 0000000..c23061a Binary files /dev/null and b/obj/evt/Peripheral/src/ch32v00x_misc.o differ diff --git a/obj/evt/Peripheral/src/ch32v00x_opa.d b/obj/evt/Peripheral/src/ch32v00x_opa.d new file mode 100644 index 0000000..092e272 --- /dev/null +++ b/obj/evt/Peripheral/src/ch32v00x_opa.d @@ -0,0 +1,45 @@ +obj/evt/Peripheral/src/ch32v00x_opa.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_opa.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/evt/Peripheral/src/ch32v00x_opa.o b/obj/evt/Peripheral/src/ch32v00x_opa.o new file mode 100644 index 0000000..8ff6d11 Binary files /dev/null and b/obj/evt/Peripheral/src/ch32v00x_opa.o differ diff --git a/obj/evt/Peripheral/src/ch32v00x_pwr.d b/obj/evt/Peripheral/src/ch32v00x_pwr.d new file mode 100644 index 0000000..98bd92d --- /dev/null +++ b/obj/evt/Peripheral/src/ch32v00x_pwr.d @@ -0,0 +1,45 @@ +obj/evt/Peripheral/src/ch32v00x_pwr.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_pwr.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/evt/Peripheral/src/ch32v00x_pwr.o b/obj/evt/Peripheral/src/ch32v00x_pwr.o new file mode 100644 index 0000000..a1c7957 Binary files /dev/null and b/obj/evt/Peripheral/src/ch32v00x_pwr.o differ diff --git a/obj/evt/Peripheral/src/ch32v00x_rcc.d b/obj/evt/Peripheral/src/ch32v00x_rcc.d new file mode 100644 index 0000000..01b66fa --- /dev/null +++ b/obj/evt/Peripheral/src/ch32v00x_rcc.d @@ -0,0 +1,45 @@ +obj/evt/Peripheral/src/ch32v00x_rcc.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_rcc.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/evt/Peripheral/src/ch32v00x_rcc.o b/obj/evt/Peripheral/src/ch32v00x_rcc.o new file mode 100644 index 0000000..26f27fa Binary files /dev/null and b/obj/evt/Peripheral/src/ch32v00x_rcc.o differ diff --git a/obj/evt/Peripheral/src/ch32v00x_spi.d b/obj/evt/Peripheral/src/ch32v00x_spi.d new file mode 100644 index 0000000..1b41585 --- /dev/null +++ b/obj/evt/Peripheral/src/ch32v00x_spi.d @@ -0,0 +1,45 @@ +obj/evt/Peripheral/src/ch32v00x_spi.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_spi.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/evt/Peripheral/src/ch32v00x_spi.o b/obj/evt/Peripheral/src/ch32v00x_spi.o new file mode 100644 index 0000000..c5651cf Binary files /dev/null and b/obj/evt/Peripheral/src/ch32v00x_spi.o differ diff --git a/obj/evt/Peripheral/src/ch32v00x_tim.d b/obj/evt/Peripheral/src/ch32v00x_tim.d new file mode 100644 index 0000000..62dc9e9 --- /dev/null +++ b/obj/evt/Peripheral/src/ch32v00x_tim.d @@ -0,0 +1,45 @@ +obj/evt/Peripheral/src/ch32v00x_tim.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_tim.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/evt/Peripheral/src/ch32v00x_tim.o b/obj/evt/Peripheral/src/ch32v00x_tim.o new file mode 100644 index 0000000..a44a08b Binary files /dev/null and b/obj/evt/Peripheral/src/ch32v00x_tim.o differ diff --git a/obj/evt/Peripheral/src/ch32v00x_usart.d b/obj/evt/Peripheral/src/ch32v00x_usart.d new file mode 100644 index 0000000..3497b58 --- /dev/null +++ b/obj/evt/Peripheral/src/ch32v00x_usart.d @@ -0,0 +1,45 @@ +obj/evt/Peripheral/src/ch32v00x_usart.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_usart.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/evt/Peripheral/src/ch32v00x_usart.o b/obj/evt/Peripheral/src/ch32v00x_usart.o new file mode 100644 index 0000000..a2a6209 Binary files /dev/null and b/obj/evt/Peripheral/src/ch32v00x_usart.o differ diff --git a/obj/evt/Peripheral/src/ch32v00x_wwdg.d b/obj/evt/Peripheral/src/ch32v00x_wwdg.d new file mode 100644 index 0000000..474ecfb --- /dev/null +++ b/obj/evt/Peripheral/src/ch32v00x_wwdg.d @@ -0,0 +1,45 @@ +obj/evt/Peripheral/src/ch32v00x_wwdg.o: \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/src/ch32v00x_wwdg.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/evt/Peripheral/src/ch32v00x_wwdg.o b/obj/evt/Peripheral/src/ch32v00x_wwdg.o new file mode 100644 index 0000000..b145a19 Binary files /dev/null and b/obj/evt/Peripheral/src/ch32v00x_wwdg.o differ diff --git a/obj/main.d b/obj/main.d new file mode 100644 index 0000000..29ee94e --- /dev/null +++ b/obj/main.d @@ -0,0 +1,45 @@ +obj/main.o: src/main.c src/debug.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +src/debug.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/main.o b/obj/main.o new file mode 100644 index 0000000..ace3cd9 Binary files /dev/null and b/obj/main.o differ diff --git a/obj/startup_ch32v00x.d b/obj/startup_ch32v00x.d new file mode 100644 index 0000000..1e0f7a5 --- /dev/null +++ b/obj/startup_ch32v00x.d @@ -0,0 +1 @@ +obj/startup_ch32v00x.o: startup_ch32v00x.S diff --git a/obj/startup_ch32v00x.o b/obj/startup_ch32v00x.o new file mode 100644 index 0000000..708f9f6 Binary files /dev/null and b/obj/startup_ch32v00x.o differ diff --git a/obj/system_ch32v00x.d b/obj/system_ch32v00x.d new file mode 100644 index 0000000..549671e --- /dev/null +++ b/obj/system_ch32v00x.d @@ -0,0 +1,44 @@ +obj/system_ch32v00x.o: src/system_ch32v00x.c \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h \ + src/system_ch32v00x.h src/ch32v00x_conf.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h \ + src/ch32v00x_it.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h \ + /opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Core/core_riscv.h: +src/system_ch32v00x.h: +src/ch32v00x_conf.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_adc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dbgmcu.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_dma.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_exti.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_flash.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_gpio.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_i2c.h: +src/ch32v00x_it.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_iwdg.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_misc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_opa.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_pwr.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_rcc.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_spi.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_tim.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_usart.h: +/opt/wch/CH32V003EVT/EVT/EXAM/SRC/Peripheral/inc/ch32v00x_wwdg.h: diff --git a/obj/system_ch32v00x.o b/obj/system_ch32v00x.o new file mode 100644 index 0000000..5f40657 Binary files /dev/null and b/obj/system_ch32v00x.o differ diff --git a/src/ch32v00x_conf.h b/src/ch32v00x_conf.h new file mode 100644 index 0000000..745768c --- /dev/null +++ b/src/ch32v00x_conf.h @@ -0,0 +1,22 @@ +#ifndef __CH32V00x_CONF_H +#define __CH32V00x_CONF_H + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#endif /* __CH32V00x_CONF_H */ diff --git a/src/ch32v00x_it.c b/src/ch32v00x_it.c new file mode 100644 index 0000000..880b0d0 --- /dev/null +++ b/src/ch32v00x_it.c @@ -0,0 +1,29 @@ +#include + +void NMI_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast"))); +void HardFault_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast"))); + +/********************************************************************* + * @fn NMI_Handler + * + * @brief This function handles NMI exception. + * + * @return none + */ +void NMI_Handler(void) { + while (1) { + } +} + +/********************************************************************* + * @fn HardFault_Handler + * + * @brief This function handles Hard Fault exception. + * + * @return none + */ +void HardFault_Handler(void) { + NVIC_SystemReset(); + while (1) { + } +} diff --git a/src/ch32v00x_it.h b/src/ch32v00x_it.h new file mode 100644 index 0000000..b696757 --- /dev/null +++ b/src/ch32v00x_it.h @@ -0,0 +1,8 @@ +#ifndef __CH32V00x_IT_H +#define __CH32V00x_IT_H + +#include +#include +#include + +#endif /* __CH32V00x_IT_H */ diff --git a/src/debug.c b/src/debug.c new file mode 100644 index 0000000..1b81a1f --- /dev/null +++ b/src/debug.c @@ -0,0 +1,235 @@ +/********************************** (C) COPYRIGHT + * ******************************* File Name : debug.c Author : WCH + * Version : V1.0.0 + * Date : 2022/08/08 + * Description : This file contains all the functions prototypes for UART + * Printf , Delay functions. + ********************************************************************************* + * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. + * Attention: This software (modified or not) and binary are used for + * microcontroller manufactured by Nanjing Qinheng Microelectronics. + *******************************************************************************/ +#include "debug.h" + +static uint8_t p_us = 0; +static uint16_t p_ms = 0; + +#define DEBUG_DATA0_ADDRESS ((volatile uint32_t *)0xE00000F4) +#define DEBUG_DATA1_ADDRESS ((volatile uint32_t *)0xE00000F8) + +/********************************************************************* + * @fn Delay_Init + * + * @brief Initializes Delay Funcation. + * + * @return none + */ +void Delay_Init(void) { + p_us = SystemCoreClock / 8000000; + p_ms = (uint16_t)p_us * 1000; +} + +/********************************************************************* + * @fn Delay_Us + * + * @brief Microsecond Delay Time. + * + * @param n - Microsecond number. + * + * @return None + */ +void Delay_Us(uint32_t n) { + uint32_t i; + + SysTick->SR &= ~(1 << 0); + i = (uint32_t)n * p_us; + + SysTick->CMP = i; + SysTick->CNT = 0; + SysTick->CTLR |= (1 << 0); + + while ((SysTick->SR & (1 << 0)) != (1 << 0)) + ; + SysTick->CTLR &= ~(1 << 0); +} + +/********************************************************************* + * @fn Delay_Ms + * + * @brief Millisecond Delay Time. + * + * @param n - Millisecond number. + * + * @return None + */ +void Delay_Ms(uint32_t n) { + uint32_t i; + + SysTick->SR &= ~(1 << 0); + i = (uint32_t)n * p_ms; + + SysTick->CMP = i; + SysTick->CNT = 0; + SysTick->CTLR |= (1 << 0); + + while ((SysTick->SR & (1 << 0)) != (1 << 0)) + ; + SysTick->CTLR &= ~(1 << 0); +} + +/********************************************************************* + * @fn USART_Printf_Init + * + * @brief Initializes the USARTx peripheral. + * + * @param baudrate - USART communication baud rate. + * + * @return None + */ +void USART_Printf_Init(uint32_t baudrate) { + GPIO_InitTypeDef GPIO_InitStructure; + USART_InitTypeDef USART_InitStructure; + +#if (DEBUG == DEBUG_UART1_NoRemap) + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_USART1, ENABLE); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_30MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_Init(GPIOD, &GPIO_InitStructure); + +#elif (DEBUG == DEBUG_UART1_Remap1) + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_USART1 | + RCC_APB2Periph_AFIO, + ENABLE); + GPIO_PinRemapConfig(GPIO_PartialRemap1_USART1, ENABLE); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_30MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_Init(GPIOD, &GPIO_InitStructure); + +#elif (DEBUG == DEBUG_UART1_Remap2) + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_USART1 | + RCC_APB2Periph_AFIO, + ENABLE); + GPIO_PinRemapConfig(GPIO_PartialRemap2_USART1, ENABLE); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_30MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_Init(GPIOD, &GPIO_InitStructure); + +#elif (DEBUG == DEBUG_UART1_Remap3) + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC | RCC_APB2Periph_USART1 | + RCC_APB2Periph_AFIO, + ENABLE); + GPIO_PinRemapConfig(GPIO_FullRemap_USART1, ENABLE); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_30MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_Init(GPIOC, &GPIO_InitStructure); + +#endif + + USART_InitStructure.USART_BaudRate = baudrate; + USART_InitStructure.USART_WordLength = USART_WordLength_8b; + USART_InitStructure.USART_StopBits = USART_StopBits_1; + USART_InitStructure.USART_Parity = USART_Parity_No; + USART_InitStructure.USART_HardwareFlowControl = + USART_HardwareFlowControl_None; + USART_InitStructure.USART_Mode = USART_Mode_Tx; + + USART_Init(USART1, &USART_InitStructure); + USART_Cmd(USART1, ENABLE); +} + +/********************************************************************* + * @fn SDI_Printf_Enable + * + * @brief Initializes the SDI printf Function. + * + * @param None + * + * @return None + */ +void SDI_Printf_Enable(void) { + *(DEBUG_DATA0_ADDRESS) = 0; + Delay_Init(); + Delay_Ms(1); +} + +/********************************************************************* + * @fn _write + * + * @brief Support Printf Function + * + * @param *buf - UART send Data. + * size - Data length. + * + * @return size - Data length + */ +__attribute__((used)) int _write(int fd, char *buf, int size) { + int i = 0; + int writeSize = size; +#if (SDI_PRINT == SDI_PR_OPEN) + do { + /** + * data0 data1 8 bytes + * data0 The lowest byte storage length, the maximum is 7 + * + */ + + while (*(DEBUG_DATA0_ADDRESS) != 0u) { + } + + if (writeSize > 7) { + *(DEBUG_DATA1_ADDRESS) = (*(buf + i + 3)) | (*(buf + i + 4) << 8) | + (*(buf + i + 5) << 16) | (*(buf + i + 6) << 24); + *(DEBUG_DATA0_ADDRESS) = (7u) | (*(buf + i) << 8) | + (*(buf + i + 1) << 16) | (*(buf + i + 2) << 24); + + i += 7; + writeSize -= 7; + } else { + *(DEBUG_DATA1_ADDRESS) = (*(buf + i + 3)) | (*(buf + i + 4) << 8) | + (*(buf + i + 5) << 16) | (*(buf + i + 6) << 24); + *(DEBUG_DATA0_ADDRESS) = (writeSize) | (*(buf + i) << 8) | + (*(buf + i + 1) << 16) | (*(buf + i + 2) << 24); + + writeSize = 0; + } + + } while (writeSize); + +#else + + for (i = 0; i < size; i++) { + while (USART_GetFlagStatus(USART1, USART_FLAG_TC) == RESET) + ; + USART_SendData(USART1, *buf++); + } + +#endif + return writeSize; +} + +/********************************************************************* + * @fn _sbrk + * + * @brief Change the spatial position of data segment. + * + * @return size: Data length + */ +__attribute__((used)) void *_sbrk(ptrdiff_t incr) { + extern char _end[]; + extern char _heap_end[]; + static char *curbrk = _end; + + if ((curbrk + incr < _end) || (curbrk + incr > _heap_end)) + return NULL - 1; + + curbrk += incr; + return curbrk - incr; +} diff --git a/src/debug.h b/src/debug.h new file mode 100644 index 0000000..2ef631c --- /dev/null +++ b/src/debug.h @@ -0,0 +1,32 @@ +#ifndef __DEBUG_H +#define __DEBUG_H + +#include +#include + +/* UART Printf Definition */ +#define DEBUG_UART1_NoRemap 1 // Tx-PD5 +#define DEBUG_UART1_Remap1 2 // Tx-PD0 +#define DEBUG_UART1_Remap2 3 // Tx-PD6 +#define DEBUG_UART1_Remap3 4 // Tx-PC0 + +/* DEBUG UATR Definition */ +#ifndef DEBUG +# define DEBUG DEBUG_UART1_NoRemap +#endif + +/* SDI Printf Definition */ +#define SDI_PR_CLOSE 0 +#define SDI_PR_OPEN 1 + +#ifndef SDI_PRINT +# define SDI_PRINT SDI_PR_CLOSE +#endif + +void Delay_Init(void); +void Delay_Us(uint32_t n); +void Delay_Ms(uint32_t n); +void USART_Printf_Init(uint32_t baudrate); +void SDI_Printf_Enable(void); + +#endif /* __DEBUG_H */ diff --git a/src/main.c b/src/main.c new file mode 100644 index 0000000..55014b7 --- /dev/null +++ b/src/main.c @@ -0,0 +1,29 @@ +#include "debug.h" + +int main(void) { + GPIO_InitTypeDef GPIO_InitStructure = {0}; + + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + + GPIO_Init(GPIOA, &GPIO_InitStructure); + + Delay_Init(); + Delay_Ms(1000); + Delay_Ms(1000); +#if (SDI_PRINT == SDI_PR_OPEN) + SDI_Printf_Enable(); +#else + USART_Printf_Init(115200); +#endif + printf("SystemClk:%d\r\n", SystemCoreClock); + printf("ChipID:%08x\r\n", DBGMCU_GetCHIPID()); + + + while (1) { + Delay_Ms(1000); + GPIOA->OUTDR ^= GPIO_Pin_1; + } +} diff --git a/src/system_ch32v00x.c b/src/system_ch32v00x.c new file mode 100644 index 0000000..cca2ea2 --- /dev/null +++ b/src/system_ch32v00x.c @@ -0,0 +1,388 @@ +#include + +/* + * Uncomment the line corresponding to the desired System clock (SYSCLK) + * frequency (after reset the HSI is used as SYSCLK source). If none of the + * define below is enabled, the HSI is used as System clock source. + */ + +// #define SYSCLK_FREQ_8MHz_HSI 8000000 +// #define SYSCLK_FREQ_24MHZ_HSI HSI_VALUE +#define SYSCLK_FREQ_48MHZ_HSI 48000000 +// #define SYSCLK_FREQ_8MHz_HSE 8000000 +// #define SYSCLK_FREQ_24MHz_HSE HSE_VALUE +// #define SYSCLK_FREQ_48MHz_HSE 48000000 + +/* Clock Definitions */ +#ifdef SYSCLK_FREQ_8MHz_HSI +uint32_t SystemCoreClock = SYSCLK_FREQ_8MHz_HSI; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_24MHZ_HSI +uint32_t SystemCoreClock = SYSCLK_FREQ_24MHZ_HSI; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_48MHZ_HSI +uint32_t SystemCoreClock = SYSCLK_FREQ_48MHZ_HSI; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_8MHz_HSE +uint32_t SystemCoreClock = SYSCLK_FREQ_8MHz_HSE; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_24MHz_HSE +uint32_t SystemCoreClock = SYSCLK_FREQ_24MHz_HSE; /* System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_48MHz_HSE +uint32_t SystemCoreClock = SYSCLK_FREQ_48MHz_HSE; /* System Clock Frequency (Core Clock) */ +#else +uint32_t SystemCoreClock = HSI_VALUE; +#endif + +__I uint8_t AHBPrescTable[16] = {1, 2, 3, 4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 7, 8}; + +/* system_private_function_proto_types */ +static void SetSysClock(void); + +#ifdef SYSCLK_FREQ_8MHz_HSI +static void SetSysClockTo_8MHz_HSI(void); +#elif defined SYSCLK_FREQ_24MHZ_HSI +static void SetSysClockTo_24MHZ_HSI(void); +#elif defined SYSCLK_FREQ_48MHZ_HSI +static void SetSysClockTo_48MHZ_HSI(void); +#elif defined SYSCLK_FREQ_8MHz_HSE +static void SetSysClockTo_8MHz_HSE(void); +#elif defined SYSCLK_FREQ_24MHz_HSE +static void SetSysClockTo_24MHz_HSE(void); +#elif defined SYSCLK_FREQ_48MHz_HSE +static void SetSysClockTo_48MHz_HSE(void); +#endif + +/********************************************************************* + * @fn SystemInit + * + * @brief Setup the microcontroller system Initialize the Embedded Flash + * Interface, the PLL and update the SystemCoreClock variable. + * + * @return none + */ +void SystemInit(void) { + RCC->CTLR |= (uint32_t)0x00000001; + RCC->CFGR0 &= (uint32_t)0xF8FF0000; + RCC->CTLR &= (uint32_t)0xFEF6FFFF; + RCC->CTLR &= (uint32_t)0xFFFBFFFF; + RCC->CFGR0 &= (uint32_t)0xFFFEFFFF; + RCC->INTR = 0x009F0000; + + RCC_AdjustHSICalibrationValue(0x10); + + SetSysClock(); +} + +/********************************************************************* + * @fn SystemCoreClockUpdate + * + * @brief Update SystemCoreClock variable according to Clock Register Values. + * + * @return none + */ +void SystemCoreClockUpdate(void) { + uint32_t tmp = 0, pllsource = 0; + + tmp = RCC->CFGR0 & RCC_SWS; + + switch (tmp) { + case 0x00: + SystemCoreClock = HSI_VALUE; + break; + case 0x04: + SystemCoreClock = HSE_VALUE; + break; + case 0x08: + pllsource = RCC->CFGR0 & RCC_PLLSRC; + if (pllsource == 0x00) + SystemCoreClock = HSI_VALUE * 2; + else + SystemCoreClock = HSE_VALUE * 2; + break; + default: + SystemCoreClock = HSI_VALUE; + break; + } + + tmp = AHBPrescTable[((RCC->CFGR0 & RCC_HPRE) >> 4)]; + + if (((RCC->CFGR0 & RCC_HPRE) >> 4) < 8) + SystemCoreClock /= tmp; + else + SystemCoreClock >>= tmp; +} + +/********************************************************************* + * @fn SetSysClock + * + * @brief Configures the System clock frequency, HCLK, PCLK2 and PCLK1 + * prescalers. + * + * @return none + */ +static void SetSysClock(void) { + RCC->APB2PCENR |= RCC_APB2Periph_GPIOD; + GPIOD->CFGLR &= (~0xF0); + GPIOD->CFGLR |= 0x80; + GPIOD->BSHR = 0x2; +// GPIO_IPD_Unused(); +#ifdef SYSCLK_FREQ_8MHz_HSI + SetSysClockTo_8MHz_HSI(); +#elif defined SYSCLK_FREQ_24MHZ_HSI + SetSysClockTo_24MHZ_HSI(); +#elif defined SYSCLK_FREQ_48MHZ_HSI + SetSysClockTo_48MHZ_HSI(); +#elif defined SYSCLK_FREQ_8MHz_HSE + SetSysClockTo_8MHz_HSE(); +#elif defined SYSCLK_FREQ_24MHz_HSE + SetSysClockTo_24MHz_HSE(); +#elif defined SYSCLK_FREQ_48MHz_HSE + SetSysClockTo_48MHz_HSE(); +#endif + + /* If none of the define above is enabled, the HSI is used as System clock. + * source (default after reset) + */ +} + +#ifdef SYSCLK_FREQ_8MHz_HSI + +/********************************************************************* + * @fn SetSysClockTo_8MHz_HSI + * + * @brief Sets HSI as System clock source and configure HCLK, PCLK2 and PCLK1 + * prescalers. + * + * @return none + */ +static void SetSysClockTo_8MHz_HSI(void) { + /* Flash 0 wait state */ + FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY); + FLASH->ACTLR |= (uint32_t)FLASH_ACTLR_LATENCY_0; + + /* HCLK = SYSCLK = APB1 */ + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV3; +} + +#elif defined SYSCLK_FREQ_24MHZ_HSI + +/********************************************************************* + * @fn SetSysClockTo_24MHZ_HSI + * + * @brief Sets System clock frequency to 24MHz and configure HCLK, PCLK2 and + * PCLK1 prescalers. + * + * @return none + */ +static void SetSysClockTo_24MHZ_HSI(void) { + /* Flash 0 wait state */ + FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY); + FLASH->ACTLR |= (uint32_t)FLASH_ACTLR_LATENCY_0; + + /* HCLK = SYSCLK = APB1 */ + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; +} + +#elif defined SYSCLK_FREQ_48MHZ_HSI + +/********************************************************************* + * @fn SetSysClockTo_48MHZ_HSI + * + * @brief Sets System clock frequency to 48MHz and configure HCLK, PCLK2 and + * PCLK1 prescalers. + * + * @return none + */ +static void SetSysClockTo_48MHZ_HSI(void) { + uint8_t tmp = 0; + + tmp = *(uint8_t *)CFG0_PLL_TRIM; + + if (tmp != 0xFF) RCC_AdjustHSICalibrationValue(tmp & 0x1F); + + /* Flash 0 wait state */ + FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY); + FLASH->ACTLR |= (uint32_t)FLASH_ACTLR_LATENCY_1; + + /* HCLK = SYSCLK = APB1 */ + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + + /* PLL configuration: PLLCLK = HSI * 2 = 48 MHz */ + RCC->CFGR0 &= (uint32_t)((uint32_t) ~(RCC_PLLSRC)); + RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSI_Mul2); + + /* Enable PLL */ + RCC->CTLR |= RCC_PLLON; + /* Wait till PLL is ready */ + while ((RCC->CTLR & RCC_PLLRDY) == 0) { + } + /* Select PLL as system clock source */ + RCC->CFGR0 &= (uint32_t)((uint32_t) ~(RCC_SW)); + RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08) { + } +} + +#elif defined SYSCLK_FREQ_8MHz_HSE + +/********************************************************************* + * @fn SetSysClockTo_8MHz_HSE + * + * @brief Sets System clock frequency to 8MHz and configure HCLK, PCLK2 and + * PCLK1 prescalers. + * + * @return none + */ +static void SetSysClockTo_8MHz_HSE(void) { + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* Close PA0-PA1 GPIO function */ + RCC->APB2PCENR |= RCC_AFIOEN; + AFIO->PCFR1 |= (1 << 15); + + RCC->CTLR |= ((uint32_t)RCC_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do { + HSEStatus = RCC->CTLR & RCC_HSERDY; + StartUpCounter++; + } while ((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CTLR & RCC_HSERDY) != RESET) + HSEStatus = (uint32_t)0x01; + else + HSEStatus = (uint32_t)0x00; + + if (HSEStatus == (uint32_t)0x01) { + /* Flash 0 wait state */ + FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY); + FLASH->ACTLR |= (uint32_t)FLASH_ACTLR_LATENCY_0; + + /* HCLK = SYSCLK = APB1 */ + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV3; + + /* Select HSE as system clock source */ + RCC->CFGR0 &= (uint32_t)((uint32_t) ~(RCC_SW)); + RCC->CFGR0 |= (uint32_t)RCC_SW_HSE; + /* Wait till HSE is used as system clock source */ + while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x04) { + } + } else { + /* + * If HSE fails to start-up, the application will have wrong clock + * configuration. User can add here some code to deal with this error + */ + } +} + +#elif defined SYSCLK_FREQ_24MHz_HSE + +/********************************************************************* + * @fn SetSysClockTo_24MHz_HSE + * + * @brief Sets System clock frequency to 24MHz and configure HCLK, PCLK2 and + * PCLK1 prescalers. + * + * @return none + */ +static void SetSysClockTo_24MHz_HSE(void) { + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* Close PA0-PA1 GPIO function */ + RCC->APB2PCENR |= RCC_AFIOEN; + AFIO->PCFR1 |= (1 << 15); + + RCC->CTLR |= ((uint32_t)RCC_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do { + HSEStatus = RCC->CTLR & RCC_HSERDY; + StartUpCounter++; + } while ((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CTLR & RCC_HSERDY) != RESET) + HSEStatus = (uint32_t)0x01; + else + HSEStatus = (uint32_t)0x00; + + if (HSEStatus == (uint32_t)0x01) { + /* Flash 0 wait state */ + FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY); + FLASH->ACTLR |= (uint32_t)FLASH_ACTLR_LATENCY_0; + + /* HCLK = SYSCLK = APB1 */ + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + + /* Select HSE as system clock source */ + RCC->CFGR0 &= (uint32_t)((uint32_t) ~(RCC_SW)); + RCC->CFGR0 |= (uint32_t)RCC_SW_HSE; + /* Wait till HSE is used as system clock source */ + while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x04) { + } + } else { + /* + * If HSE fails to start-up, the application will have wrong clock + * configuration. User can add here some code to deal with this error + */ + } +} + +#elif defined SYSCLK_FREQ_48MHz_HSE + +/********************************************************************* + * @fn SetSysClockTo_48MHz_HSE + * + * @brief Sets System clock frequency to 48MHz and configure HCLK, PCLK2 and + * PCLK1 prescalers. + * + * @return none + */ +static void SetSysClockTo_48MHz_HSE(void) { + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* Close PA0-PA1 GPIO function */ + RCC->APB2PCENR |= RCC_AFIOEN; + AFIO->PCFR1 |= (1 << 15); + + RCC->CTLR |= ((uint32_t)RCC_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do { + HSEStatus = RCC->CTLR & RCC_HSERDY; + StartUpCounter++; + } while ((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CTLR & RCC_HSERDY) != RESET) + HSEStatus = (uint32_t)0x01; + else + HSEStatus = (uint32_t)0x00; + + if (HSEStatus == (uint32_t)0x01) { + /* Flash 0 wait state */ + FLASH->ACTLR &= (uint32_t)((uint32_t)~FLASH_ACTLR_LATENCY); + FLASH->ACTLR |= (uint32_t)FLASH_ACTLR_LATENCY_1; + + /* HCLK = SYSCLK = APB1 */ + RCC->CFGR0 |= (uint32_t)RCC_HPRE_DIV1; + + /* PLL configuration: PLLCLK = HSE * 2 = 48 MHz */ + RCC->CFGR0 &= (uint32_t)((uint32_t) ~(RCC_PLLSRC)); + RCC->CFGR0 |= (uint32_t)(RCC_PLLSRC_HSE_Mul2); + + /* Enable PLL */ + RCC->CTLR |= RCC_PLLON; + /* Wait till PLL is ready */ + while ((RCC->CTLR & RCC_PLLRDY) == 0) { + } + /* Select PLL as system clock source */ + RCC->CFGR0 &= (uint32_t)((uint32_t) ~(RCC_SW)); + RCC->CFGR0 |= (uint32_t)RCC_SW_PLL; + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR0 & (uint32_t)RCC_SWS) != (uint32_t)0x08) { + } + } else { + /* + * If HSE fails to start-up, the application will have wrong clock + * configuration. User can add here some code to deal with this error + */ + } +} +#endif diff --git a/src/system_ch32v00x.h b/src/system_ch32v00x.h new file mode 100644 index 0000000..4f78e6f --- /dev/null +++ b/src/system_ch32v00x.h @@ -0,0 +1,12 @@ +#ifndef __SYSTEM_CH32V00x_H +#define __SYSTEM_CH32V00x_H + +#include + +extern uint32_t SystemCoreClock; /* System Clock Frequency (Core Clock) */ + +/* System_Exported_Functions */ +extern void SystemInit(void); +extern void SystemCoreClockUpdate(void); + +#endif /*__CH32V00x_SYSTEM_H */ diff --git a/startup_ch32v00x.S b/startup_ch32v00x.S new file mode 100644 index 0000000..fae2a7b --- /dev/null +++ b/startup_ch32v00x.S @@ -0,0 +1,179 @@ +;/********************************** (C) COPYRIGHT ******************************* +;* File Name : startup_ch32v00x.s +;* Author : WCH +;* Version : V1.0.1 +;* Date : 2023/12/11 +;* Description : vector table for eclipse toolchain. +;********************************************************************************* +;* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd. +;* Attention: This software (modified or not) and binary are used for +;* microcontroller manufactured by Nanjing Qinheng Microelectronics. +;*******************************************************************************/ + + .section .init, "ax", @progbits + .globl _start + .align 2 +_start: + .option norvc; + j handle_reset + .word 0 + .word NMI_Handler /* NMI Handler */ + .word HardFault_Handler /* Hard Fault Handler */ + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word SysTick_Handler /* SysTick Handler */ + .word 0 + .word SW_Handler /* SW Handler */ + .word 0 + /* External Interrupts */ + .word WWDG_IRQHandler /* Window Watchdog */ + .word PVD_IRQHandler /* PVD through EXTI Line detect */ + .word FLASH_IRQHandler /* Flash */ + .word RCC_IRQHandler /* RCC */ + .word EXTI7_0_IRQHandler /* EXTI Line 7..0 */ + .word AWU_IRQHandler /* AWU */ + .word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */ + .word DMA1_Channel2_IRQHandler /* DMA1 Channel 2 */ + .word DMA1_Channel3_IRQHandler /* DMA1 Channel 3 */ + .word DMA1_Channel4_IRQHandler /* DMA1 Channel 4 */ + .word DMA1_Channel5_IRQHandler /* DMA1 Channel 5 */ + .word DMA1_Channel6_IRQHandler /* DMA1 Channel 6 */ + .word DMA1_Channel7_IRQHandler /* DMA1 Channel 7 */ + .word ADC1_IRQHandler /* ADC1 */ + .word I2C1_EV_IRQHandler /* I2C1 Event */ + .word I2C1_ER_IRQHandler /* I2C1 Error */ + .word USART1_IRQHandler /* USART1 */ + .word SPI1_IRQHandler /* SPI1 */ + .word TIM1_BRK_IRQHandler /* TIM1 Break */ + .word TIM1_UP_IRQHandler /* TIM1 Update */ + .word TIM1_TRG_COM_IRQHandler /* TIM1 Trigger and Commutation */ + .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + .word TIM2_IRQHandler /* TIM2 */ + + .option rvc; + .section .text.vector_handler, "ax", @progbits + .weak NMI_Handler + .weak HardFault_Handler + .weak SysTick_Handler + .weak SW_Handler + .weak WWDG_IRQHandler + .weak PVD_IRQHandler + .weak FLASH_IRQHandler + .weak RCC_IRQHandler + .weak EXTI7_0_IRQHandler + .weak AWU_IRQHandler + .weak DMA1_Channel1_IRQHandler + .weak DMA1_Channel2_IRQHandler + .weak DMA1_Channel3_IRQHandler + .weak DMA1_Channel4_IRQHandler + .weak DMA1_Channel5_IRQHandler + .weak DMA1_Channel6_IRQHandler + .weak DMA1_Channel7_IRQHandler + .weak ADC1_IRQHandler + .weak I2C1_EV_IRQHandler + .weak I2C1_ER_IRQHandler + .weak USART1_IRQHandler + .weak SPI1_IRQHandler + .weak TIM1_BRK_IRQHandler + .weak TIM1_UP_IRQHandler + .weak TIM1_TRG_COM_IRQHandler + .weak TIM1_CC_IRQHandler + .weak TIM2_IRQHandler + +NMI_Handler: +HardFault_Handler: +SysTick_Handler: +SW_Handler: +WWDG_IRQHandler: +PVD_IRQHandler: +FLASH_IRQHandler: +RCC_IRQHandler: +EXTI7_0_IRQHandler: +AWU_IRQHandler: +DMA1_Channel1_IRQHandler: +DMA1_Channel2_IRQHandler: +DMA1_Channel3_IRQHandler: +DMA1_Channel4_IRQHandler: +DMA1_Channel5_IRQHandler: +DMA1_Channel6_IRQHandler: +DMA1_Channel7_IRQHandler: +ADC1_IRQHandler: +I2C1_EV_IRQHandler: +I2C1_ER_IRQHandler: +USART1_IRQHandler: +SPI1_IRQHandler: +TIM1_BRK_IRQHandler: +TIM1_UP_IRQHandler: +TIM1_TRG_COM_IRQHandler: +TIM1_CC_IRQHandler: +TIM2_IRQHandler: +1: + j 1b + + .section .text.handle_reset, "ax", @progbits + .weak handle_reset + .align 1 +handle_reset: +.option push +.option norelax + la gp, __global_pointer$ +.option pop +1: + la sp, _eusrstack + + /* Load highcode code section from flash to RAM */ +2: + la a0, _highcode_lma + la a1, _highcode_vma_start + la a2, _highcode_vma_end + bgeu a1, a2, 2f +1: + lw t0, (a0) + sw t0, (a1) + addi a0, a0, 4 + addi a1, a1, 4 + bltu a1, a2, 1b +2: +/* Load data section from flash to RAM */ + la a0, _data_lma + la a1, _data_vma + la a2, _edata + bgeu a1, a2, 2f +1: + lw t0, (a0) + sw t0, (a1) + addi a0, a0, 4 + addi a1, a1, 4 + bltu a1, a2, 1b +2: +/* Clear bss section */ + la a0, _sbss + la a1, _ebss + bgeu a0, a1, 2f +1: + sw zero, (a0) + addi a0, a0, 4 + bltu a0, a1, 1b +2: +/* Enable global interrupt and configure privileged mode */ + li t0, 0x1880 + csrw mstatus, t0 +/* Enable interrupt nesting and hardware stack */ + li t0, 0x3 + csrw 0x804, t0 +/* Configure the interrupt vector table recognition mode and entry address mode */ + la t0, _start + ori t0, t0, 3 + csrw mtvec, t0 + + jal SystemInit + la t0, main + csrw mepc, t0 + mret +